110Vchuanganqi.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00002280 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000240 08002340 08002340 00012340 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08002580 08002580 00020010 2**0 CONTENTS 4 .ARM 00000000 08002580 08002580 00020010 2**0 CONTENTS 5 .preinit_array 00000000 08002580 08002580 00020010 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08002580 08002580 00012580 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 08002584 08002584 00012584 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 00000010 20000000 08002588 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000200 20000010 08002598 00020010 2**3 ALLOC 10 ._user_heap_stack 00000600 20000210 08002598 00020210 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 00020010 2**0 CONTENTS, READONLY 12 .debug_info 0000de37 00000000 00000000 00020038 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00002d5c 00000000 00000000 0002de6f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00000840 00000000 00000000 00030bd0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_ranges 00000cf0 00000000 00000000 00031410 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00010cac 00000000 00000000 00032100 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00011a23 00000000 00000000 00042dac 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 0005c329 00000000 00000000 000547cf 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000050 00000000 00000000 000b0af8 2**0 CONTENTS, READONLY 20 .debug_frame 000014c0 00000000 00000000 000b0b48 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_loc 0000681d 00000000 00000000 000b2008 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080000c0 <__do_global_dtors_aux>: 80000c0: b510 push {r4, lr} 80000c2: 4c06 ldr r4, [pc, #24] ; (80000dc <__do_global_dtors_aux+0x1c>) 80000c4: 7823 ldrb r3, [r4, #0] 80000c6: 2b00 cmp r3, #0 80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a> 80000ca: 4b05 ldr r3, [pc, #20] ; (80000e0 <__do_global_dtors_aux+0x20>) 80000cc: 2b00 cmp r3, #0 80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16> 80000d0: 4804 ldr r0, [pc, #16] ; (80000e4 <__do_global_dtors_aux+0x24>) 80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16> 80000d4: bf00 nop 80000d6: 2301 movs r3, #1 80000d8: 7023 strb r3, [r4, #0] 80000da: bd10 pop {r4, pc} 80000dc: 20000010 .word 0x20000010 80000e0: 00000000 .word 0x00000000 80000e4: 08002328 .word 0x08002328 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) 80000ea: b510 push {r4, lr} 80000ec: 2b00 cmp r3, #0 80000ee: d003 beq.n 80000f8 80000f0: 4903 ldr r1, [pc, #12] ; (8000100 ) 80000f2: 4804 ldr r0, [pc, #16] ; (8000104 ) 80000f4: e000 b.n 80000f8 80000f6: bf00 nop 80000f8: bd10 pop {r4, pc} 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000014 .word 0x20000014 8000104: 08002328 .word 0x08002328 08000108 <__gnu_thumb1_case_sqi>: 8000108: b402 push {r1} 800010a: 4671 mov r1, lr 800010c: 0849 lsrs r1, r1, #1 800010e: 0049 lsls r1, r1, #1 8000110: 5609 ldrsb r1, [r1, r0] 8000112: 0049 lsls r1, r1, #1 8000114: 448e add lr, r1 8000116: bc02 pop {r1} 8000118: 4770 bx lr 800011a: 46c0 nop ; (mov r8, r8) 0800011c <__gnu_thumb1_case_uqi>: 800011c: b402 push {r1} 800011e: 4671 mov r1, lr 8000120: 0849 lsrs r1, r1, #1 8000122: 0049 lsls r1, r1, #1 8000124: 5c09 ldrb r1, [r1, r0] 8000126: 0049 lsls r1, r1, #1 8000128: 448e add lr, r1 800012a: bc02 pop {r1} 800012c: 4770 bx lr 800012e: 46c0 nop ; (mov r8, r8) 08000130 <__udivsi3>: 8000130: 2200 movs r2, #0 8000132: 0843 lsrs r3, r0, #1 8000134: 428b cmp r3, r1 8000136: d374 bcc.n 8000222 <__udivsi3+0xf2> 8000138: 0903 lsrs r3, r0, #4 800013a: 428b cmp r3, r1 800013c: d35f bcc.n 80001fe <__udivsi3+0xce> 800013e: 0a03 lsrs r3, r0, #8 8000140: 428b cmp r3, r1 8000142: d344 bcc.n 80001ce <__udivsi3+0x9e> 8000144: 0b03 lsrs r3, r0, #12 8000146: 428b cmp r3, r1 8000148: d328 bcc.n 800019c <__udivsi3+0x6c> 800014a: 0c03 lsrs r3, r0, #16 800014c: 428b cmp r3, r1 800014e: d30d bcc.n 800016c <__udivsi3+0x3c> 8000150: 22ff movs r2, #255 ; 0xff 8000152: 0209 lsls r1, r1, #8 8000154: ba12 rev r2, r2 8000156: 0c03 lsrs r3, r0, #16 8000158: 428b cmp r3, r1 800015a: d302 bcc.n 8000162 <__udivsi3+0x32> 800015c: 1212 asrs r2, r2, #8 800015e: 0209 lsls r1, r1, #8 8000160: d065 beq.n 800022e <__udivsi3+0xfe> 8000162: 0b03 lsrs r3, r0, #12 8000164: 428b cmp r3, r1 8000166: d319 bcc.n 800019c <__udivsi3+0x6c> 8000168: e000 b.n 800016c <__udivsi3+0x3c> 800016a: 0a09 lsrs r1, r1, #8 800016c: 0bc3 lsrs r3, r0, #15 800016e: 428b cmp r3, r1 8000170: d301 bcc.n 8000176 <__udivsi3+0x46> 8000172: 03cb lsls r3, r1, #15 8000174: 1ac0 subs r0, r0, r3 8000176: 4152 adcs r2, r2 8000178: 0b83 lsrs r3, r0, #14 800017a: 428b cmp r3, r1 800017c: d301 bcc.n 8000182 <__udivsi3+0x52> 800017e: 038b lsls r3, r1, #14 8000180: 1ac0 subs r0, r0, r3 8000182: 4152 adcs r2, r2 8000184: 0b43 lsrs r3, r0, #13 8000186: 428b cmp r3, r1 8000188: d301 bcc.n 800018e <__udivsi3+0x5e> 800018a: 034b lsls r3, r1, #13 800018c: 1ac0 subs r0, r0, r3 800018e: 4152 adcs r2, r2 8000190: 0b03 lsrs r3, r0, #12 8000192: 428b cmp r3, r1 8000194: d301 bcc.n 800019a <__udivsi3+0x6a> 8000196: 030b lsls r3, r1, #12 8000198: 1ac0 subs r0, r0, r3 800019a: 4152 adcs r2, r2 800019c: 0ac3 lsrs r3, r0, #11 800019e: 428b cmp r3, r1 80001a0: d301 bcc.n 80001a6 <__udivsi3+0x76> 80001a2: 02cb lsls r3, r1, #11 80001a4: 1ac0 subs r0, r0, r3 80001a6: 4152 adcs r2, r2 80001a8: 0a83 lsrs r3, r0, #10 80001aa: 428b cmp r3, r1 80001ac: d301 bcc.n 80001b2 <__udivsi3+0x82> 80001ae: 028b lsls r3, r1, #10 80001b0: 1ac0 subs r0, r0, r3 80001b2: 4152 adcs r2, r2 80001b4: 0a43 lsrs r3, r0, #9 80001b6: 428b cmp r3, r1 80001b8: d301 bcc.n 80001be <__udivsi3+0x8e> 80001ba: 024b lsls r3, r1, #9 80001bc: 1ac0 subs r0, r0, r3 80001be: 4152 adcs r2, r2 80001c0: 0a03 lsrs r3, r0, #8 80001c2: 428b cmp r3, r1 80001c4: d301 bcc.n 80001ca <__udivsi3+0x9a> 80001c6: 020b lsls r3, r1, #8 80001c8: 1ac0 subs r0, r0, r3 80001ca: 4152 adcs r2, r2 80001cc: d2cd bcs.n 800016a <__udivsi3+0x3a> 80001ce: 09c3 lsrs r3, r0, #7 80001d0: 428b cmp r3, r1 80001d2: d301 bcc.n 80001d8 <__udivsi3+0xa8> 80001d4: 01cb lsls r3, r1, #7 80001d6: 1ac0 subs r0, r0, r3 80001d8: 4152 adcs r2, r2 80001da: 0983 lsrs r3, r0, #6 80001dc: 428b cmp r3, r1 80001de: d301 bcc.n 80001e4 <__udivsi3+0xb4> 80001e0: 018b lsls r3, r1, #6 80001e2: 1ac0 subs r0, r0, r3 80001e4: 4152 adcs r2, r2 80001e6: 0943 lsrs r3, r0, #5 80001e8: 428b cmp r3, r1 80001ea: d301 bcc.n 80001f0 <__udivsi3+0xc0> 80001ec: 014b lsls r3, r1, #5 80001ee: 1ac0 subs r0, r0, r3 80001f0: 4152 adcs r2, r2 80001f2: 0903 lsrs r3, r0, #4 80001f4: 428b cmp r3, r1 80001f6: d301 bcc.n 80001fc <__udivsi3+0xcc> 80001f8: 010b lsls r3, r1, #4 80001fa: 1ac0 subs r0, r0, r3 80001fc: 4152 adcs r2, r2 80001fe: 08c3 lsrs r3, r0, #3 8000200: 428b cmp r3, r1 8000202: d301 bcc.n 8000208 <__udivsi3+0xd8> 8000204: 00cb lsls r3, r1, #3 8000206: 1ac0 subs r0, r0, r3 8000208: 4152 adcs r2, r2 800020a: 0883 lsrs r3, r0, #2 800020c: 428b cmp r3, r1 800020e: d301 bcc.n 8000214 <__udivsi3+0xe4> 8000210: 008b lsls r3, r1, #2 8000212: 1ac0 subs r0, r0, r3 8000214: 4152 adcs r2, r2 8000216: 0843 lsrs r3, r0, #1 8000218: 428b cmp r3, r1 800021a: d301 bcc.n 8000220 <__udivsi3+0xf0> 800021c: 004b lsls r3, r1, #1 800021e: 1ac0 subs r0, r0, r3 8000220: 4152 adcs r2, r2 8000222: 1a41 subs r1, r0, r1 8000224: d200 bcs.n 8000228 <__udivsi3+0xf8> 8000226: 4601 mov r1, r0 8000228: 4152 adcs r2, r2 800022a: 4610 mov r0, r2 800022c: 4770 bx lr 800022e: e7ff b.n 8000230 <__udivsi3+0x100> 8000230: b501 push {r0, lr} 8000232: 2000 movs r0, #0 8000234: f000 f806 bl 8000244 <__aeabi_idiv0> 8000238: bd02 pop {r1, pc} 800023a: 46c0 nop ; (mov r8, r8) 0800023c <__aeabi_uidivmod>: 800023c: 2900 cmp r1, #0 800023e: d0f7 beq.n 8000230 <__udivsi3+0x100> 8000240: e776 b.n 8000130 <__udivsi3> 8000242: 4770 bx lr 08000244 <__aeabi_idiv0>: 8000244: 4770 bx lr 8000246: 46c0 nop ; (mov r8, r8) 08000248 <__aeabi_llsr>: 8000248: 40d0 lsrs r0, r2 800024a: 000b movs r3, r1 800024c: 40d1 lsrs r1, r2 800024e: 469c mov ip, r3 8000250: 3a20 subs r2, #32 8000252: 40d3 lsrs r3, r2 8000254: 4318 orrs r0, r3 8000256: 4252 negs r2, r2 8000258: 4663 mov r3, ip 800025a: 4093 lsls r3, r2 800025c: 4318 orrs r0, r3 800025e: 4770 bx lr 08000260 : /** * Enable DMA controller clock */ void MX_DMA_Init(void) { 8000260: b513 push {r0, r1, r4, lr} /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 8000262: 2401 movs r4, #1 8000264: 4b0c ldr r3, [pc, #48] ; (8000298 ) /* DMA interrupt init */ /* DMA1_Channel2_3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 1, 0); 8000266: 0021 movs r1, r4 __HAL_RCC_DMA1_CLK_ENABLE(); 8000268: 695a ldr r2, [r3, #20] HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 1, 0); 800026a: 200a movs r0, #10 __HAL_RCC_DMA1_CLK_ENABLE(); 800026c: 4322 orrs r2, r4 800026e: 615a str r2, [r3, #20] 8000270: 695b ldr r3, [r3, #20] HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 1, 0); 8000272: 2200 movs r2, #0 __HAL_RCC_DMA1_CLK_ENABLE(); 8000274: 4023 ands r3, r4 8000276: 9301 str r3, [sp, #4] 8000278: 9b01 ldr r3, [sp, #4] HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 1, 0); 800027a: f000 fc3d bl 8000af8 HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); 800027e: 200a movs r0, #10 8000280: f000 fc64 bl 8000b4c /* DMA1_Channel4_5_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel4_5_IRQn, 1, 0); 8000284: 2200 movs r2, #0 8000286: 0021 movs r1, r4 8000288: 200b movs r0, #11 800028a: f000 fc35 bl 8000af8 HAL_NVIC_EnableIRQ(DMA1_Channel4_5_IRQn); 800028e: 200b movs r0, #11 8000290: f000 fc5c bl 8000b4c } 8000294: bd13 pop {r0, r1, r4, pc} 8000296: 46c0 nop ; (mov r8, r8) 8000298: 40021000 .word 0x40021000 0800029c : * Output * EVENT_OUT * EXTI */ void MX_GPIO_Init(void) { 800029c: b530 push {r4, r5, lr} 800029e: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80002a0: 2214 movs r2, #20 80002a2: 2100 movs r1, #0 80002a4: a803 add r0, sp, #12 80002a6: f002 f836 bl 8002316 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); 80002aa: 2080 movs r0, #128 ; 0x80 80002ac: 4b1a ldr r3, [pc, #104] ; (8000318 ) 80002ae: 03c0 lsls r0, r0, #15 80002b0: 6959 ldr r1, [r3, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, electric_Pin|TX485_PN_Pin|negative_Pin|positive_Pin, GPIO_PIN_RESET); 80002b2: 2490 movs r4, #144 ; 0x90 __HAL_RCC_GPIOF_CLK_ENABLE(); 80002b4: 4301 orrs r1, r0 80002b6: 6159 str r1, [r3, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 80002b8: 2180 movs r1, #128 ; 0x80 __HAL_RCC_GPIOF_CLK_ENABLE(); 80002ba: 695a ldr r2, [r3, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 80002bc: 0289 lsls r1, r1, #10 __HAL_RCC_GPIOF_CLK_ENABLE(); 80002be: 4002 ands r2, r0 80002c0: 9201 str r2, [sp, #4] 80002c2: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 80002c4: 695a ldr r2, [r3, #20] HAL_GPIO_WritePin(GPIOA, electric_Pin|TX485_PN_Pin|negative_Pin|positive_Pin, GPIO_PIN_RESET); 80002c6: 05e4 lsls r4, r4, #23 __HAL_RCC_GPIOA_CLK_ENABLE(); 80002c8: 430a orrs r2, r1 80002ca: 615a str r2, [r3, #20] 80002cc: 695b ldr r3, [r3, #20] HAL_GPIO_WritePin(GPIOA, electric_Pin|TX485_PN_Pin|negative_Pin|positive_Pin, GPIO_PIN_RESET); 80002ce: 0020 movs r0, r4 __HAL_RCC_GPIOA_CLK_ENABLE(); 80002d0: 400b ands r3, r1 80002d2: 9302 str r3, [sp, #8] HAL_GPIO_WritePin(GPIOA, electric_Pin|TX485_PN_Pin|negative_Pin|positive_Pin, GPIO_PIN_RESET); 80002d4: 2200 movs r2, #0 80002d6: 21e8 movs r1, #232 ; 0xe8 __HAL_RCC_GPIOA_CLK_ENABLE(); 80002d8: 9b02 ldr r3, [sp, #8] HAL_GPIO_WritePin(GPIOA, electric_Pin|TX485_PN_Pin|negative_Pin|positive_Pin, GPIO_PIN_RESET); 80002da: f000 ff29 bl 8001130 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); 80002de: 2201 movs r2, #1 80002e0: 0020 movs r0, r4 80002e2: 2110 movs r1, #16 80002e4: f000 ff24 bl 8001130 /*Configure GPIO pins : PAPin PAPin PAPin */ GPIO_InitStruct.Pin = electric_Pin|negative_Pin|positive_Pin; 80002e8: 23c8 movs r3, #200 ; 0xc8 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80002ea: 2501 movs r5, #1 GPIO_InitStruct.Pin = electric_Pin|negative_Pin|positive_Pin; 80002ec: 9303 str r3, [sp, #12] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 80002ee: 3bc6 subs r3, #198 ; 0xc6 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80002f0: 0020 movs r0, r4 GPIO_InitStruct.Pull = GPIO_PULLDOWN; 80002f2: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80002f4: a903 add r1, sp, #12 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80002f6: 195b adds r3, r3, r5 80002f8: 9306 str r3, [sp, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80002fa: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80002fc: f000 fe62 bl 8000fc4 /*Configure GPIO pins : PAPin PAPin */ GPIO_InitStruct.Pin = LED_Pin|TX485_PN_Pin; 8000300: 2330 movs r3, #48 ; 0x30 8000302: 9303 str r3, [sp, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8000304: 2300 movs r3, #0 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000306: 0020 movs r0, r4 8000308: a903 add r1, sp, #12 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800030a: 9504 str r5, [sp, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 800030c: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; 800030e: 9506 str r5, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000310: f000 fe58 bl 8000fc4 } 8000314: b009 add sp, #36 ; 0x24 8000316: bd30 pop {r4, r5, pc} 8000318: 40021000 .word 0x40021000 0800031c : /* USER CODE END IWDG_Init 0 */ /* USER CODE BEGIN IWDG_Init 1 */ /* USER CODE END IWDG_Init 1 */ hiwdg.Instance = IWDG; 800031c: 4808 ldr r0, [pc, #32] ; (8000340 ) 800031e: 4b09 ldr r3, [pc, #36] ; (8000344 ) { 8000320: b510 push {r4, lr} hiwdg.Instance = IWDG; 8000322: 6003 str r3, [r0, #0] hiwdg.Init.Prescaler = IWDG_PRESCALER_256; 8000324: 2306 movs r3, #6 8000326: 6043 str r3, [r0, #4] hiwdg.Init.Window = 4095; 8000328: 4b07 ldr r3, [pc, #28] ; (8000348 ) 800032a: 60c3 str r3, [r0, #12] hiwdg.Init.Reload = 3000; 800032c: 4b07 ldr r3, [pc, #28] ; (800034c ) 800032e: 6083 str r3, [r0, #8] if (HAL_IWDG_Init(&hiwdg) != HAL_OK) 8000330: f000 ff04 bl 800113c 8000334: 2800 cmp r0, #0 8000336: d001 beq.n 800033c { Error_Handler(); 8000338: f000 f8fc bl 8000534 } /* USER CODE BEGIN IWDG_Init 2 */ /* USER CODE END IWDG_Init 2 */ } 800033c: bd10 pop {r4, pc} 800033e: 46c0 nop ; (mov r8, r8) 8000340: 2000002c .word 0x2000002c 8000344: 40003000 .word 0x40003000 8000348: 00000fff .word 0x00000fff 800034c: 00000bb8 .word 0x00000bb8 08000350 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8000350: b530 push {r4, r5, lr} 8000352: b095 sub sp, #84 ; 0x54 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8000354: 2228 movs r2, #40 ; 0x28 8000356: 2100 movs r1, #0 8000358: a80a add r0, sp, #40 ; 0x28 800035a: f001 ffdc bl 8002316 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800035e: 2210 movs r2, #16 8000360: 2100 movs r1, #0 8000362: 4668 mov r0, sp 8000364: f001 ffd7 bl 8002316 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8000368: 2210 movs r2, #16 800036a: 2100 movs r1, #0 800036c: a804 add r0, sp, #16 800036e: f001 ffd2 bl 8002316 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; 8000372: 2309 movs r3, #9 8000374: 9308 str r3, [sp, #32] RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8000376: 2380 movs r3, #128 ; 0x80 8000378: 025b lsls r3, r3, #9 800037a: 9311 str r3, [sp, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 800037c: 2380 movs r3, #128 ; 0x80 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 800037e: 2401 movs r4, #1 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8000380: 2502 movs r5, #2 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 8000382: 035b lsls r3, r3, #13 RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8000384: a808 add r0, sp, #32 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8000386: 9409 str r4, [sp, #36] ; 0x24 RCC_OscInitStruct.LSIState = RCC_LSI_ON; 8000388: 940f str r4, [sp, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800038a: 9510 str r5, [sp, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 800038c: 9312 str r3, [sp, #72] ; 0x48 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800038e: f000 ff0f bl 80011b0 8000392: 2800 cmp r0, #0 8000394: d001 beq.n 800039a \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000396: b672 cpsid i void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8000398: e7fe b.n 8000398 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800039a: 2307 movs r3, #7 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800039c: 9002 str r0, [sp, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 800039e: 9003 str r0, [sp, #12] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 80003a0: 0021 movs r1, r4 80003a2: 4668 mov r0, sp RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80003a4: 9300 str r3, [sp, #0] RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 80003a6: 9501 str r5, [sp, #4] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 80003a8: f001 f934 bl 8001614 80003ac: 2800 cmp r0, #0 80003ae: d001 beq.n 80003b4 80003b0: b672 cpsid i while (1) 80003b2: e7fe b.n 80003b2 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; 80003b4: 9006 str r0, [sp, #24] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80003b6: a804 add r0, sp, #16 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 80003b8: 9404 str r4, [sp, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80003ba: f001 f9bf bl 800173c 80003be: 2800 cmp r0, #0 80003c0: d001 beq.n 80003c6 80003c2: b672 cpsid i while (1) 80003c4: e7fe b.n 80003c4 } 80003c6: b015 add sp, #84 ; 0x54 80003c8: bd30 pop {r4, r5, pc} ... 080003cc
: { 80003cc: b5f8 push {r3, r4, r5, r6, r7, lr} HAL_Init(); 80003ce: f000 fb5f bl 8000a90 SystemClock_Config(); 80003d2: f7ff ffbd bl 8000350 MX_GPIO_Init(); 80003d6: f7ff ff61 bl 800029c MX_DMA_Init(); 80003da: f7ff ff41 bl 8000260 MX_USART1_UART_Init(); 80003de: f000 f907 bl 80005f0 MX_IWDG_Init(); 80003e2: f7ff ff9b bl 800031c RS485ADDR = *(uint16_t*)FLASH485_ADDR; //获取从机地址 80003e6: 4b48 ldr r3, [pc, #288] ; (8000508 ) 80003e8: 4948 ldr r1, [pc, #288] ; (800050c ) 80003ea: 8818 ldrh r0, [r3, #0] if(RS485ADDR == 0x0000 || RS485ADDR == 0xFFFF) 80003ec: 4b48 ldr r3, [pc, #288] ; (8000510 ) 80003ee: 1e42 subs r2, r0, #1 80003f0: b292 uxth r2, r2 80003f2: 429a cmp r2, r3 80003f4: d87a bhi.n 80004ec RS485ADDR = *(uint16_t*)FLASH485_ADDR; //获取从机地址 80003f6: 8008 strh r0, [r1, #0] positive_time = *(uint16_t*)(FLASH485_ADDR+2); //获取从机地址 80003f8: 4a46 ldr r2, [pc, #280] ; (8000514 ) 80003fa: 8811 ldrh r1, [r2, #0] if(positive_time == 0x0000 || positive_time == 0xFFFF) 80003fc: 1e4a subs r2, r1, #1 80003fe: b292 uxth r2, r2 8000400: 429a cmp r2, r3 8000402: d876 bhi.n 80004f2 positive_time = *(uint16_t*)(FLASH485_ADDR+2); //获取从机地址 8000404: 4a44 ldr r2, [pc, #272] ; (8000518 ) 8000406: 8011 strh r1, [r2, #0] negative_time = *(uint16_t*)(FLASH485_ADDR+4); //获取脉宽 8000408: 4a44 ldr r2, [pc, #272] ; (800051c ) 800040a: 8811 ldrh r1, [r2, #0] if(negative_time == 0x0000 || negative_time == 0xFFFF) 800040c: 1e4a subs r2, r1, #1 800040e: b292 uxth r2, r2 8000410: 429a cmp r2, r3 8000412: d873 bhi.n 80004fc negative_time = *(uint16_t*)(FLASH485_ADDR+4); //获取脉宽 8000414: 4b42 ldr r3, [pc, #264] ; (8000520 ) 8000416: 8019 strh r1, [r3, #0] HAL_IWDG_Refresh(&hiwdg); //喂狗 8000418: 4f42 ldr r7, [pc, #264] ; (8000524 ) 800041a: 0038 movs r0, r7 800041c: f000 fec0 bl 80011a0 HAL_UART_DMAStop(&huart1);//复位DMA 8000420: 4c41 ldr r4, [pc, #260] ; (8000528 ) 8000422: 0020 movs r0, r4 8000424: f001 fa9a bl 800195c HAL_UART_Receive_DMA(&huart1,(uint8_t *)RxBuff,sizeof(RxBuff)); 8000428: 2220 movs r2, #32 800042a: 0020 movs r0, r4 800042c: 493f ldr r1, [pc, #252] ; (800052c ) 800042e: f001 ff0f bl 8002250 HAL_GPIO_WritePin(positive_GPIO_Port, positive_Pin, GPIO_PIN_RESET); 8000432: 2090 movs r0, #144 ; 0x90 8000434: 2200 movs r2, #0 8000436: 2180 movs r1, #128 ; 0x80 8000438: 05c0 lsls r0, r0, #23 800043a: f000 fe79 bl 8001130 HAL_GPIO_WritePin(negative_GPIO_Port, negative_Pin, GPIO_PIN_RESET); 800043e: 2090 movs r0, #144 ; 0x90 8000440: 2200 movs r2, #0 8000442: 2140 movs r1, #64 ; 0x40 HAL_GPIO_WritePin(LED_GPIO_Port,LED_Pin,GPIO_PIN_RESET); 8000444: 2490 movs r4, #144 ; 0x90 HAL_GPIO_WritePin(negative_GPIO_Port, negative_Pin, GPIO_PIN_RESET); 8000446: 05c0 lsls r0, r0, #23 8000448: f000 fe72 bl 8001130 HAL_GPIO_WritePin(LED_GPIO_Port,LED_Pin,GPIO_PIN_RESET); 800044c: 05e4 lsls r4, r4, #23 HAL_GPIO_WritePin(positive_GPIO_Port, positive_Pin, GPIO_PIN_SET); 800044e: 2501 movs r5, #1 HAL_GPIO_WritePin(electric_GPIO_Port, electric_Pin, GPIO_PIN_SET); 8000450: 2608 movs r6, #8 HAL_IWDG_Refresh(&hiwdg); 8000452: 0038 movs r0, r7 8000454: f000 fea4 bl 80011a0 HAL_GPIO_WritePin(LED_GPIO_Port,LED_Pin,GPIO_PIN_RESET); 8000458: 2200 movs r2, #0 800045a: 2110 movs r1, #16 800045c: 0020 movs r0, r4 800045e: f000 fe67 bl 8001130 HAL_GPIO_WritePin(positive_GPIO_Port, positive_Pin, GPIO_PIN_SET); 8000462: 002a movs r2, r5 8000464: 2180 movs r1, #128 ; 0x80 8000466: 0020 movs r0, r4 8000468: f000 fe62 bl 8001130 HAL_GPIO_WritePin(electric_GPIO_Port, electric_Pin, GPIO_PIN_SET); 800046c: 002a movs r2, r5 800046e: 0031 movs r1, r6 8000470: 0020 movs r0, r4 8000472: f000 fe5d bl 8001130 HAL_Delay(positive_time); 8000476: 4b28 ldr r3, [pc, #160] ; (8000518 ) 8000478: 8818 ldrh r0, [r3, #0] 800047a: f000 fb2b bl 8000ad4 HAL_GPIO_WritePin(positive_GPIO_Port, positive_Pin, GPIO_PIN_RESET); //放电 800047e: 2200 movs r2, #0 8000480: 2180 movs r1, #128 ; 0x80 8000482: 0020 movs r0, r4 8000484: f000 fe54 bl 8001130 HAL_GPIO_WritePin(electric_GPIO_Port, electric_Pin, GPIO_PIN_RESET); 8000488: 2200 movs r2, #0 800048a: 0031 movs r1, r6 800048c: 0020 movs r0, r4 800048e: f000 fe4f bl 8001130 HAL_Delay(100); 8000492: 2064 movs r0, #100 ; 0x64 8000494: f000 fb1e bl 8000ad4 HAL_GPIO_WritePin(LED_GPIO_Port,LED_Pin,GPIO_PIN_SET); 8000498: 002a movs r2, r5 800049a: 2110 movs r1, #16 800049c: 0020 movs r0, r4 800049e: f000 fe47 bl 8001130 HAL_GPIO_WritePin(negative_GPIO_Port, negative_Pin, GPIO_PIN_SET); 80004a2: 002a movs r2, r5 80004a4: 2140 movs r1, #64 ; 0x40 80004a6: 0020 movs r0, r4 80004a8: f000 fe42 bl 8001130 HAL_GPIO_WritePin(electric_GPIO_Port, electric_Pin, GPIO_PIN_RESET); 80004ac: 2200 movs r2, #0 80004ae: 0031 movs r1, r6 80004b0: 0020 movs r0, r4 80004b2: f000 fe3d bl 8001130 HAL_Delay(negative_time); 80004b6: 4b1a ldr r3, [pc, #104] ; (8000520 ) 80004b8: 8818 ldrh r0, [r3, #0] 80004ba: f000 fb0b bl 8000ad4 HAL_GPIO_WritePin(negative_GPIO_Port, negative_Pin, GPIO_PIN_RESET); //放电 80004be: 2200 movs r2, #0 80004c0: 2140 movs r1, #64 ; 0x40 80004c2: 0020 movs r0, r4 80004c4: f000 fe34 bl 8001130 HAL_GPIO_WritePin(electric_GPIO_Port, electric_Pin, GPIO_PIN_SET); 80004c8: 002a movs r2, r5 80004ca: 0031 movs r1, r6 80004cc: 0020 movs r0, r4 80004ce: f000 fe2f bl 8001130 HAL_Delay(100); 80004d2: 2064 movs r0, #100 ; 0x64 80004d4: f000 fafe bl 8000ad4 if(usart_count > 0) 80004d8: 4b15 ldr r3, [pc, #84] ; (8000530 ) 80004da: 781b ldrb r3, [r3, #0] 80004dc: 2b00 cmp r3, #0 80004de: d0b8 beq.n 8000452 Usart_Receive(); 80004e0: f000 f9fe bl 80008e0 usart_count = 0; 80004e4: 2200 movs r2, #0 80004e6: 4b12 ldr r3, [pc, #72] ; (8000530 ) 80004e8: 701a strb r2, [r3, #0] 80004ea: e7b0 b.n 800044e RS485ADDR = 1; 80004ec: 2201 movs r2, #1 80004ee: 800a strh r2, [r1, #0] 80004f0: e782 b.n 80003f8 positive_time = 2000; 80004f2: 22fa movs r2, #250 ; 0xfa 80004f4: 4908 ldr r1, [pc, #32] ; (8000518 ) 80004f6: 00d2 lsls r2, r2, #3 80004f8: 800a strh r2, [r1, #0] 80004fa: e785 b.n 8000408 negative_time = 2000; 80004fc: 23fa movs r3, #250 ; 0xfa 80004fe: 4a08 ldr r2, [pc, #32] ; (8000520 ) 8000500: 00db lsls r3, r3, #3 8000502: 8013 strh r3, [r2, #0] 8000504: e788 b.n 8000418 8000506: 46c0 nop ; (mov r8, r8) 8000508: 08003c00 .word 0x08003c00 800050c: 20000004 .word 0x20000004 8000510: 0000fffd .word 0x0000fffd 8000514: 08003c02 .word 0x08003c02 8000518: 20000008 .word 0x20000008 800051c: 08003c04 .word 0x08003c04 8000520: 20000006 .word 0x20000006 8000524: 2000002c .word 0x2000002c 8000528: 200000c4 .word 0x200000c4 800052c: 20000148 .word 0x20000148 8000530: 200001a8 .word 0x200001a8 08000534 : 8000534: b672 cpsid i while (1) 8000536: e7fe b.n 8000536 08000538 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8000538: 2001 movs r0, #1 800053a: 4b0a ldr r3, [pc, #40] ; (8000564 ) { 800053c: b082 sub sp, #8 __HAL_RCC_SYSCFG_CLK_ENABLE(); 800053e: 6999 ldr r1, [r3, #24] 8000540: 4301 orrs r1, r0 8000542: 6199 str r1, [r3, #24] __HAL_RCC_PWR_CLK_ENABLE(); 8000544: 2180 movs r1, #128 ; 0x80 __HAL_RCC_SYSCFG_CLK_ENABLE(); 8000546: 699a ldr r2, [r3, #24] __HAL_RCC_PWR_CLK_ENABLE(); 8000548: 0549 lsls r1, r1, #21 __HAL_RCC_SYSCFG_CLK_ENABLE(); 800054a: 4002 ands r2, r0 800054c: 9200 str r2, [sp, #0] 800054e: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8000550: 69da ldr r2, [r3, #28] 8000552: 430a orrs r2, r1 8000554: 61da str r2, [r3, #28] 8000556: 69db ldr r3, [r3, #28] 8000558: 400b ands r3, r1 800055a: 9301 str r3, [sp, #4] 800055c: 9b01 ldr r3, [sp, #4] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800055e: b002 add sp, #8 8000560: 4770 bx lr 8000562: 46c0 nop ; (mov r8, r8) 8000564: 40021000 .word 0x40021000 08000568 : { /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8000568: e7fe b.n 8000568 0800056a : void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800056a: e7fe b.n 800056a 0800056c : /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } 800056c: 4770 bx lr 0800056e : 800056e: 4770 bx lr 08000570 : /** * @brief This function handles DMA1 channel 2 and 3 interrupts. */ void DMA1_Channel2_3_IRQHandler(void) { 8000570: b510 push {r4, lr} /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ /* USER CODE END DMA1_Channel2_3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8000572: 4802 ldr r0, [pc, #8] ; (800057c ) 8000574: f000 fbc1 bl 8000cfa /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ /* USER CODE END DMA1_Channel2_3_IRQn 1 */ } 8000578: bd10 pop {r4, pc} 800057a: 46c0 nop ; (mov r8, r8) 800057c: 2000003c .word 0x2000003c 08000580 : /** * @brief This function handles DMA1 channel 4 and 5 interrupts. */ void DMA1_Channel4_5_IRQHandler(void) { 8000580: b510 push {r4, lr} /* USER CODE BEGIN DMA1_Channel4_5_IRQn 0 */ /* USER CODE END DMA1_Channel4_5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8000582: 4802 ldr r0, [pc, #8] ; (800058c ) 8000584: f000 fbb9 bl 8000cfa /* USER CODE BEGIN DMA1_Channel4_5_IRQn 1 */ /* USER CODE END DMA1_Channel4_5_IRQn 1 */ } 8000588: bd10 pop {r4, pc} 800058a: 46c0 nop ; (mov r8, r8) 800058c: 20000080 .word 0x20000080 08000590 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 8000590: b570 push {r4, r5, r6, lr} /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8000592: 4c11 ldr r4, [pc, #68] ; (80005d8 ) 8000594: 0020 movs r0, r4 8000596: f001 faa7 bl 8001ae8 /* USER CODE BEGIN USART1_IRQn 1 */ if(__HAL_UART_GET_FLAG(&huart1,UART_FLAG_IDLE) == SET ) 800059a: 2210 movs r2, #16 800059c: 6823 ldr r3, [r4, #0] 800059e: 69d9 ldr r1, [r3, #28] 80005a0: 4211 tst r1, r2 80005a2: d018 beq.n 80005d6 { __HAL_UART_CLEAR_IDLEFLAG(&huart1); //清除标志????????? 80005a4: 621a str r2, [r3, #32] HAL_UART_DMAStop(&huart1); 80005a6: 0020 movs r0, r4 80005a8: f001 f9d8 bl 800195c if(usart_count == 0) 80005ac: 4b0b ldr r3, [pc, #44] ; (80005dc ) 80005ae: 4d0c ldr r5, [pc, #48] ; (80005e0 ) 80005b0: 781a ldrb r2, [r3, #0] 80005b2: 2a00 cmp r2, #0 80005b4: d10a bne.n 80005cc { //获取接收数据个数 usart_count = BUFF_LEN - __HAL_DMA_GET_COUNTER(&hdma_usart1_rx); 80005b6: 4a0b ldr r2, [pc, #44] ; (80005e4 ) { memcpy(uBuff,RxBuff,usart_count); 80005b8: 480b ldr r0, [pc, #44] ; (80005e8 ) usart_count = BUFF_LEN - __HAL_DMA_GET_COUNTER(&hdma_usart1_rx); 80005ba: 6812 ldr r2, [r2, #0] 80005bc: 6851 ldr r1, [r2, #4] 80005be: 2220 movs r2, #32 80005c0: 1a52 subs r2, r2, r1 80005c2: b2d2 uxtb r2, r2 memcpy(uBuff,RxBuff,usart_count); 80005c4: 0029 movs r1, r5 usart_count = BUFF_LEN - __HAL_DMA_GET_COUNTER(&hdma_usart1_rx); 80005c6: 701a strb r2, [r3, #0] memcpy(uBuff,RxBuff,usart_count); 80005c8: f001 fe9c bl 8002304 } } HAL_UART_Receive_DMA(&huart1,(uint8_t *)RxBuff,sizeof(RxBuff)); 80005cc: 2220 movs r2, #32 80005ce: 0029 movs r1, r5 80005d0: 0020 movs r0, r4 80005d2: f001 fe3d bl 8002250 } /* USER CODE END USART1_IRQn 1 */ } 80005d6: bd70 pop {r4, r5, r6, pc} 80005d8: 200000c4 .word 0x200000c4 80005dc: 200001a8 .word 0x200001a8 80005e0: 20000148 .word 0x20000148 80005e4: 2000003c .word 0x2000003c 80005e8: 20000188 .word 0x20000188 080005ec : before branch to main program. This call is made inside the "startup_stm32f0xx.s" file. User can setups the default system clock (System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers and Flash settings). */ } 80005ec: 4770 bx lr ... 080005f0 : /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 80005f0: 480b ldr r0, [pc, #44] ; (8000620 ) 80005f2: 4b0c ldr r3, [pc, #48] ; (8000624 ) { 80005f4: b510 push {r4, lr} huart1.Instance = USART1; 80005f6: 6003 str r3, [r0, #0] huart1.Init.BaudRate = 9600; 80005f8: 2396 movs r3, #150 ; 0x96 80005fa: 019b lsls r3, r3, #6 huart1.Init.WordLength = UART_WORDLENGTH_8B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; huart1.Init.Mode = UART_MODE_TX_RX; 80005fc: 220c movs r2, #12 huart1.Init.BaudRate = 9600; 80005fe: 6043 str r3, [r0, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8000600: 2300 movs r3, #0 huart1.Init.Mode = UART_MODE_TX_RX; 8000602: 6142 str r2, [r0, #20] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8000604: 6083 str r3, [r0, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8000606: 60c3 str r3, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 8000608: 6103 str r3, [r0, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800060a: 6183 str r3, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800060c: 61c3 str r3, [r0, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 800060e: 6203 str r3, [r0, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8000610: 6243 str r3, [r0, #36] ; 0x24 if (HAL_UART_Init(&huart1) != HAL_OK) 8000612: f001 fd97 bl 8002144 8000616: 2800 cmp r0, #0 8000618: d001 beq.n 800061e { Error_Handler(); 800061a: f7ff ff8b bl 8000534 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800061e: bd10 pop {r4, pc} 8000620: 200000c4 .word 0x200000c4 8000624: 40013800 .word 0x40013800 08000628 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 8000628: b530 push {r4, r5, lr} 800062a: 0005 movs r5, r0 800062c: b089 sub sp, #36 ; 0x24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800062e: 2214 movs r2, #20 8000630: 2100 movs r1, #0 8000632: a803 add r0, sp, #12 8000634: f001 fe6f bl 8002316 if(uartHandle->Instance==USART1) 8000638: 4b35 ldr r3, [pc, #212] ; (8000710 ) 800063a: 682a ldr r2, [r5, #0] 800063c: 429a cmp r2, r3 800063e: d165 bne.n 800070c { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8000640: 2080 movs r0, #128 ; 0x80 8000642: 4b34 ldr r3, [pc, #208] ; (8000714 ) 8000644: 01c0 lsls r0, r0, #7 8000646: 6999 ldr r1, [r3, #24] 8000648: 4301 orrs r1, r0 800064a: 6199 str r1, [r3, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); 800064c: 2180 movs r1, #128 ; 0x80 __HAL_RCC_USART1_CLK_ENABLE(); 800064e: 699a ldr r2, [r3, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000650: 0289 lsls r1, r1, #10 __HAL_RCC_USART1_CLK_ENABLE(); 8000652: 4002 ands r2, r0 8000654: 9201 str r2, [sp, #4] 8000656: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000658: 695a ldr r2, [r3, #20] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = GPIO_AF1_USART1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800065a: 2090 movs r0, #144 ; 0x90 __HAL_RCC_GPIOA_CLK_ENABLE(); 800065c: 430a orrs r2, r1 800065e: 615a str r2, [r3, #20] 8000660: 695b ldr r3, [r3, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000662: 05c0 lsls r0, r0, #23 __HAL_RCC_GPIOA_CLK_ENABLE(); 8000664: 400b ands r3, r1 8000666: 9302 str r3, [sp, #8] 8000668: 9b02 ldr r3, [sp, #8] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 800066a: 23c0 movs r3, #192 ; 0xc0 800066c: 00db lsls r3, r3, #3 800066e: 9303 str r3, [sp, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000670: 2302 movs r3, #2 8000672: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8000674: 3301 adds r3, #1 8000676: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000678: a903 add r1, sp, #12 GPIO_InitStruct.Alternate = GPIO_AF1_USART1; 800067a: 3b02 subs r3, #2 800067c: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800067e: f000 fca1 bl 8000fc4 /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel3; 8000682: 4c25 ldr r4, [pc, #148] ; (8000718 ) 8000684: 4b25 ldr r3, [pc, #148] ; (800071c ) hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8000686: 2280 movs r2, #128 ; 0x80 hdma_usart1_rx.Instance = DMA1_Channel3; 8000688: 6023 str r3, [r4, #0] hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 800068a: 2300 movs r3, #0 800068c: 6063 str r3, [r4, #4] hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800068e: 60a3 str r3, [r4, #8] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8000690: 6123 str r3, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8000692: 6163 str r3, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8000694: 61a3 str r3, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_MEDIUM; 8000696: 2380 movs r3, #128 ; 0x80 if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8000698: 0020 movs r0, r4 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_MEDIUM; 800069a: 015b lsls r3, r3, #5 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 800069c: 60e2 str r2, [r4, #12] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_MEDIUM; 800069e: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80006a0: f000 fa7a bl 8000b98 80006a4: 2800 cmp r0, #0 80006a6: d001 beq.n 80006ac { Error_Handler(); 80006a8: f7ff ff44 bl 8000534 } __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; 80006ac: 4b1c ldr r3, [pc, #112] ; (8000720 ) __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx); 80006ae: 672c str r4, [r5, #112] ; 0x70 80006b0: 6265 str r5, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 80006b2: 4c1c ldr r4, [pc, #112] ; (8000724 ) hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80006b4: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Instance = DMA1_Channel4; 80006b6: 6023 str r3, [r4, #0] hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80006b8: 2310 movs r3, #16 80006ba: 6063 str r3, [r4, #4] hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80006bc: 2300 movs r3, #0 80006be: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80006c0: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80006c2: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 80006c4: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_MEDIUM; 80006c6: 2380 movs r3, #128 ; 0x80 if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80006c8: 0020 movs r0, r4 hdma_usart1_tx.Init.Priority = DMA_PRIORITY_MEDIUM; 80006ca: 015b lsls r3, r3, #5 hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80006cc: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_MEDIUM; 80006ce: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80006d0: f000 fa62 bl 8000b98 80006d4: 2800 cmp r0, #0 80006d6: d001 beq.n 80006dc { Error_Handler(); 80006d8: f7ff ff2c bl 8000534 } __HAL_DMA_REMAP_CHANNEL_ENABLE(DMA_REMAP_USART1_TX_DMA_CH4); 80006dc: 2380 movs r3, #128 ; 0x80 80006de: 4a12 ldr r2, [pc, #72] ; (8000728 ) 80006e0: 009b lsls r3, r3, #2 80006e2: 6811 ldr r1, [r2, #0] __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80006e4: 201b movs r0, #27 __HAL_DMA_REMAP_CHANNEL_ENABLE(DMA_REMAP_USART1_TX_DMA_CH4); 80006e6: 430b orrs r3, r1 80006e8: 6013 str r3, [r2, #0] HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80006ea: 2200 movs r2, #0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); 80006ec: 66ec str r4, [r5, #108] ; 0x6c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80006ee: 0011 movs r1, r2 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); 80006f0: 6265 str r5, [r4, #36] ; 0x24 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80006f2: f000 fa01 bl 8000af8 HAL_NVIC_EnableIRQ(USART1_IRQn); 80006f6: 201b movs r0, #27 80006f8: f000 fa28 bl 8000b4c /* USER CODE BEGIN USART1_MspInit 1 */ __HAL_UART_ENABLE_IT(&huart1,UART_IT_IDLE); //使能串口空闲中断 80006fc: 2210 movs r2, #16 80006fe: 4b0b ldr r3, [pc, #44] ; (800072c ) 8000700: 681b ldr r3, [r3, #0] 8000702: 6819 ldr r1, [r3, #0] 8000704: 430a orrs r2, r1 8000706: 601a str r2, [r3, #0] __HAL_UART_CLEAR_FLAG(&huart1,UART_CLEAR_IDLEF|UART_CLEAR_TCF);//清除空闲中断和发送完成中? 8000708: 2250 movs r2, #80 ; 0x50 800070a: 621a str r2, [r3, #32] /* USER CODE END USART1_MspInit 1 */ } } 800070c: b009 add sp, #36 ; 0x24 800070e: bd30 pop {r4, r5, pc} 8000710: 40013800 .word 0x40013800 8000714: 40021000 .word 0x40021000 8000718: 2000003c .word 0x2000003c 800071c: 40020030 .word 0x40020030 8000720: 40020044 .word 0x40020044 8000724: 20000080 .word 0x20000080 8000728: 40010000 .word 0x40010000 800072c: 200000c4 .word 0x200000c4 08000730 : memset(uBuff, 0, sizeof(uBuff)); // 清空 } void send_ack(uint8_t a) { 8000730: b510 push {r4, lr} 8000732: 0004 movs r4, r0 HAL_GPIO_WritePin(TX485_PN_GPIO_Port, TX485_PN_Pin, GPIO_PIN_SET);//使能485芯片发送 8000734: 2090 movs r0, #144 ; 0x90 8000736: 2201 movs r2, #1 8000738: 2120 movs r1, #32 800073a: 05c0 lsls r0, r0, #23 800073c: f000 fcf8 bl 8001130 HAL_UART_Transmit_DMA(&huart1, TXBuff, a); 8000740: 4908 ldr r1, [pc, #32] ; (8000764 ) 8000742: 4809 ldr r0, [pc, #36] ; (8000768 ) 8000744: b2a2 uxth r2, r4 8000746: f001 f8ad bl 80018a4 while(HAL_DMA_GetState(&hdma_usart1_tx) != HAL_DMA_STATE_READY); 800074a: 4808 ldr r0, [pc, #32] ; (800076c ) 800074c: f000 fb1e bl 8000d8c 8000750: 2801 cmp r0, #1 8000752: d1fa bne.n 800074a HAL_GPIO_WritePin(TX485_PN_GPIO_Port, TX485_PN_Pin, GPIO_PIN_RESET);//使能485芯片接收 8000754: 2090 movs r0, #144 ; 0x90 8000756: 2200 movs r2, #0 8000758: 2120 movs r1, #32 800075a: 05c0 lsls r0, r0, #23 800075c: f000 fce8 bl 8001130 } 8000760: bd10 pop {r4, pc} 8000762: 46c0 nop ; (mov r8, r8) 8000764: 20000168 .word 0x20000168 8000768: 200000c4 .word 0x200000c4 800076c: 20000080 .word 0x20000080 08000770 : uint8_t write_flash(void) { 8000770: b570 push {r4, r5, r6, lr} FLASH_EraseInitTypeDef EraseInitType; uint32_t PageError; uint8_t a[8] = {0}; 8000772: 2300 movs r3, #0 //stm32f030F4P6: flash 16k,1k一页，共16页 EraseInitType.TypeErase = FLASH_TYPEERASE_PAGES; //页擦书 EraseInitType.PageAddress = FLASH485_ADDR; //擦除页地址 EraseInitType.NbPages = 1; //擦除数量 8000774: 2401 movs r4, #1 EraseInitType.PageAddress = FLASH485_ADDR; //擦除页地址 8000776: 4e16 ldr r6, [pc, #88] ; (80007d0 ) { 8000778: b086 sub sp, #24 uint8_t a[8] = {0}; 800077a: 9302 str r3, [sp, #8] EraseInitType.TypeErase = FLASH_TYPEERASE_PAGES; //页擦书 800077c: 9303 str r3, [sp, #12] EraseInitType.PageAddress = FLASH485_ADDR; //擦除页地址 800077e: 9604 str r6, [sp, #16] EraseInitType.NbPages = 1; //擦除数量 8000780: 9405 str r4, [sp, #20] HAL_FLASH_Unlock(); //解锁 8000782: f000 fb27 bl 8000dd4 if(HAL_FLASHEx_Erase(&EraseInitType, &PageError) != HAL_OK) //擦除 8000786: 4669 mov r1, sp 8000788: a803 add r0, sp, #12 uint8_t a[8] = {0}; 800078a: ad01 add r5, sp, #4 if(HAL_FLASHEx_Erase(&EraseInitType, &PageError) != HAL_OK) //擦除 800078c: f000 fbd0 bl 8000f30 8000790: 2800 cmp r0, #0 8000792: d118 bne.n 80007c6 { return 1; } a[0] = RS485ADDR&0xFF; //地址 8000794: 4b0f ldr r3, [pc, #60] ; (80007d4 ) a[2] = positive_time&0xFF; //占空比 a[3] = positive_time>>8; a[4] = negative_time&0xFF; //数据修正的比例系数 a[5] = negative_time>>8; uint64_t *b = (uint64_t*)a; if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, FLASH485_ADDR, *b) != HAL_OK) 8000796: 0031 movs r1, r6 a[0] = RS485ADDR&0xFF; //地址 8000798: 881b ldrh r3, [r3, #0] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, FLASH485_ADDR, *b) != HAL_OK) 800079a: 3003 adds r0, #3 a[0] = RS485ADDR&0xFF; //地址 800079c: 702b strb r3, [r5, #0] a[1] = RS485ADDR>>8; 800079e: 0a1b lsrs r3, r3, #8 80007a0: 706b strb r3, [r5, #1] a[2] = positive_time&0xFF; //占空比 80007a2: 4b0d ldr r3, [pc, #52] ; (80007d8 ) 80007a4: 881b ldrh r3, [r3, #0] 80007a6: 70ab strb r3, [r5, #2] a[3] = positive_time>>8; 80007a8: 0a1b lsrs r3, r3, #8 80007aa: 70eb strb r3, [r5, #3] a[4] = negative_time&0xFF; //数据修正的比例系数 80007ac: 4b0b ldr r3, [pc, #44] ; (80007dc ) 80007ae: 881b ldrh r3, [r3, #0] 80007b0: 712b strb r3, [r5, #4] a[5] = negative_time>>8; 80007b2: 0a1b lsrs r3, r3, #8 80007b4: 716b strb r3, [r5, #5] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, FLASH485_ADDR, *b) != HAL_OK) 80007b6: 9a01 ldr r2, [sp, #4] 80007b8: 9b02 ldr r3, [sp, #8] 80007ba: f000 fb53 bl 8000e64 80007be: 1e04 subs r4, r0, #0 80007c0: d104 bne.n 80007cc { return 3 ; } HAL_FLASH_Lock(); 80007c2: f000 fb1b bl 8000dfc return 0; } 80007c6: 0020 movs r0, r4 80007c8: b006 add sp, #24 80007ca: bd70 pop {r4, r5, r6, pc} return 3 ; 80007cc: 2403 movs r4, #3 80007ce: e7fa b.n 80007c6 80007d0: 08003c00 .word 0x08003c00 80007d4: 20000004 .word 0x20000004 80007d8: 20000008 .word 0x20000008 80007dc: 20000006 .word 0x20000006 080007e0 : { 80007e0: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} int16_t data = BEBufToUint16( (uint8_t*)(&uBuff[4])); //要修改的数据 80007e2: 4c3a ldr r4, [pc, #232] ; (80008cc ) 80007e4: 1d20 adds r0, r4, #4 80007e6: f000 f897 bl 8000918 80007ea: 0005 movs r5, r0 uint16_t reg = BEBufToUint16( (uint8_t*)(&uBuff[2])); //寄存器地址 80007ec: 1ca0 adds r0, r4, #2 80007ee: f000 f893 bl 8000918 uint16_t crc = CRC16_Modbus( (uint8_t*)(&uBuff[0]),6); //计算CRC 80007f2: 2106 movs r1, #6 uint16_t reg = BEBufToUint16( (uint8_t*)(&uBuff[2])); //寄存器地址 80007f4: 0007 movs r7, r0 uint16_t crc = CRC16_Modbus( (uint8_t*)(&uBuff[0]),6); //计算CRC 80007f6: 0020 movs r0, r4 80007f8: f000 f896 bl 8000928 TXBuff[i] = uBuff[i]; 80007fc: 4e34 ldr r6, [pc, #208] ; (80008d0 ) 80007fe: 2206 movs r2, #6 uint16_t crc = CRC16_Modbus( (uint8_t*)(&uBuff[0]),6); //计算CRC 8000800: 9001 str r0, [sp, #4] TXBuff[i] = uBuff[i]; 8000802: 0021 movs r1, r4 8000804: 0030 movs r0, r6 8000806: f001 fd7d bl 8002304 TXBuff[7] = crc&0x00FF; 800080a: 466a mov r2, sp TXBuff[6] = crc>>8; 800080c: 9b01 ldr r3, [sp, #4] TXBuff[7] = crc&0x00FF; 800080e: 7910 ldrb r0, [r2, #4] TXBuff[6] = crc>>8; 8000810: 0a1b lsrs r3, r3, #8 8000812: b2db uxtb r3, r3 8000814: 71b3 strb r3, [r6, #6] TXBuff[7] = crc&0x00FF; 8000816: 71f0 strb r0, [r6, #7] if(reg == 0x000f && TXBuff[6]== uBuff[6] && TXBuff[7]== uBuff[7]) //比较寄存器值和CRC校验值 8000818: 2f0f cmp r7, #15 800081a: d12f bne.n 800087c 800081c: 79a2 ldrb r2, [r4, #6] 800081e: 429a cmp r2, r3 8000820: d126 bne.n 8000870 8000822: 79e3 ldrb r3, [r4, #7] 8000824: 4283 cmp r3, r0 8000826: d123 bne.n 8000870 if(data>=1 && data<= 247) //从机地址要大于等于1，小于等于247 8000828: 1e6b subs r3, r5, #1 800082a: b29b uxth r3, r3 800082c: 2bf6 cmp r3, #246 ; 0xf6 800082e: d80f bhi.n 8000850 RS485ADDR = data; //更新地址 8000830: 4b28 ldr r3, [pc, #160] ; (80008d4 ) 8000832: 801d strh r5, [r3, #0] \details Assigns the given value to the Priority Mask Register. \param [in] priMask Priority Mask */ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8000834: 2301 movs r3, #1 8000836: f383 8810 msr PRIMASK, r3 if(write_flash() == 0) 800083a: f7ff ff99 bl 8000770 800083e: 2800 cmp r0, #0 8000840: d132 bne.n 80008a8 if(uBuff[0] != 0) 8000842: 7823 ldrb r3, [r4, #0] 8000844: 2b00 cmp r3, #0 8000846: d02f beq.n 80008a8 send_ack(8); 8000848: 3008 adds r0, #8 800084a: f7ff ff71 bl 8000730 800084e: e02b b.n 80008a8 TXBuff[4] = 0xFF; 8000850: 23ff movs r3, #255 ; 0xff crc = CRC16_Modbus( (uint8_t*)(&uBuff[0]),6); //计算CRC 8000852: 2106 movs r1, #6 TXBuff[4] = 0xFF; 8000854: 7133 strb r3, [r6, #4] TXBuff[5] = 0xFF; 8000856: 7173 strb r3, [r6, #5] crc = CRC16_Modbus( (uint8_t*)(&uBuff[0]),6); //计算CRC 8000858: 0020 movs r0, r4 800085a: f000 f865 bl 8000928 TXBuff[6] = crc>>8; 800085e: 0a03 lsrs r3, r0, #8 8000860: 71b3 strb r3, [r6, #6] if(uBuff[0] != 0) //广播地址不返回 8000862: 7823 ldrb r3, [r4, #0] TXBuff[7] = crc&0x00FF; 8000864: 71f0 strb r0, [r6, #7] if(uBuff[0] != 0) //广播地址不返回 8000866: 2b00 cmp r3, #0 8000868: d002 beq.n 8000870 send_ack(8); 800086a: 2008 movs r0, #8 800086c: f7ff ff60 bl 8000730 memset(uBuff, 0, sizeof(uBuff)); // 清空 8000870: 2220 movs r2, #32 8000872: 2100 movs r1, #0 8000874: 0020 movs r0, r4 8000876: f001 fd4e bl 8002316 } 800087a: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} int16_t data = BEBufToUint16( (uint8_t*)(&uBuff[4])); //要修改的数据 800087c: b22a sxth r2, r5 else if(reg == 0x0004 && TXBuff[6]== uBuff[6] && TXBuff[7]== uBuff[7]) 800087e: 2f04 cmp r7, #4 8000880: d116 bne.n 80008b0 8000882: 79a1 ldrb r1, [r4, #6] 8000884: 4299 cmp r1, r3 8000886: d1f3 bne.n 8000870 8000888: 79e3 ldrb r3, [r4, #7] 800088a: 4283 cmp r3, r0 800088c: d1f0 bne.n 8000870 if(data>=500) 800088e: 23fa movs r3, #250 ; 0xfa 8000890: 005b lsls r3, r3, #1 8000892: 429a cmp r2, r3 8000894: dbec blt.n 8000870 positive_time = data; //更新地址 8000896: 4b10 ldr r3, [pc, #64] ; (80008d8 ) negative_time = data; 8000898: 801d strh r5, [r3, #0] 800089a: 2301 movs r3, #1 800089c: f383 8810 msr PRIMASK, r3 if(write_flash() == 0) 80008a0: f7ff ff66 bl 8000770 80008a4: 2800 cmp r0, #0 80008a6: d0cf beq.n 8000848 80008a8: 2300 movs r3, #0 80008aa: f383 8810 msr PRIMASK, r3 } 80008ae: e7df b.n 8000870 else if(reg == 0x0005 && TXBuff[6]== uBuff[6] && TXBuff[7]== uBuff[7]) 80008b0: 2f05 cmp r7, #5 80008b2: d1dd bne.n 8000870 80008b4: 79a1 ldrb r1, [r4, #6] 80008b6: 4299 cmp r1, r3 80008b8: d1da bne.n 8000870 80008ba: 79e3 ldrb r3, [r4, #7] 80008bc: 4283 cmp r3, r0 80008be: d1d7 bne.n 8000870 if(data>=500) //数据大于1小于3300 80008c0: 23fa movs r3, #250 ; 0xfa 80008c2: 005b lsls r3, r3, #1 80008c4: 429a cmp r2, r3 80008c6: dbd3 blt.n 8000870 negative_time = data; 80008c8: 4b04 ldr r3, [pc, #16] ; (80008dc ) 80008ca: e7e5 b.n 8000898 80008cc: 20000188 .word 0x20000188 80008d0: 20000168 .word 0x20000168 80008d4: 20000004 .word 0x20000004 80008d8: 20000008 .word 0x20000008 80008dc: 20000006 .word 0x20000006 080008e0 : { 80008e0: b510 push {r4, lr} if( (uint16_t)uBuff[0] == RS485ADDR && usart_count == 8) 80008e2: 4b0a ldr r3, [pc, #40] ; (800090c ) 80008e4: 490a ldr r1, [pc, #40] ; (8000910 ) 80008e6: 781a ldrb r2, [r3, #0] 80008e8: 8809 ldrh r1, [r1, #0] 80008ea: 4c0a ldr r4, [pc, #40] ; (8000914 ) 80008ec: 4291 cmp r1, r2 80008ee: d10a bne.n 8000906 80008f0: 7822 ldrb r2, [r4, #0] 80008f2: 2a08 cmp r2, #8 80008f4: d104 bne.n 8000900 switch(uBuff[1]) //第二个字节，功能码 80008f6: 785b ldrb r3, [r3, #1] 80008f8: 2b06 cmp r3, #6 80008fa: d101 bne.n 8000900 MODBUS_06H(); 80008fc: f7ff ff70 bl 80007e0 usart_count = 0; // 清零，下次再次进入 8000900: 2300 movs r3, #0 8000902: 7023 strb r3, [r4, #0] } 8000904: bd10 pop {r4, pc} else if( (uint16_t)uBuff[0] == 0 && usart_count== 8) 8000906: 2a00 cmp r2, #0 8000908: d1fa bne.n 8000900 800090a: e7f1 b.n 80008f0 800090c: 20000188 .word 0x20000188 8000910: 20000004 .word 0x20000004 8000914: 200001a8 .word 0x200001a8 08000918 : * 大端(Big Endian)与小端(Little Endian) ********************************************************************************************************* */ uint16_t BEBufToUint16(uint8_t *_pBuf) { return (((uint16_t)_pBuf[0] << 8) | _pBuf[1]); 8000918: 7802 ldrb r2, [r0, #0] 800091a: 7840 ldrb r0, [r0, #1] 800091c: 0200 lsls r0, r0, #8 800091e: 4310 orrs r0, r2 8000920: ba40 rev16 r0, r0 8000922: b280 uxth r0, r0 } 8000924: 4770 bx lr ... 08000928 : ********************************************************************************************************* */ uint16_t CRC16_Modbus(uint8_t *_pBuf, uint16_t _usLen) { uint8_t ucCRCHi = 0xFF; /* 高CRC字节初始化 */ uint8_t ucCRCLo = 0xFF; /* 低CRC 字节初始化 */ 8000928: 22ff movs r2, #255 ; 0xff uint8_t ucCRCHi = 0xFF; /* 高CRC字节初始化 */ 800092a: 0013 movs r3, r2 { 800092c: b5f0 push {r4, r5, r6, r7, lr} uint16_t usIndex; /* CRC循环中的索引 */ while (_usLen--) 800092e: 4d08 ldr r5, [pc, #32] ; (8000950 ) { usIndex = ucCRCHi ^ *_pBuf++; /* 计算CRC */ ucCRCHi = ucCRCLo ^ s_CRCHi[usIndex]; 8000930: 4e08 ldr r6, [pc, #32] ; (8000954 ) ucCRCLo = s_CRCLo[usIndex]; 8000932: 4f09 ldr r7, [pc, #36] ; (8000958 ) while (_usLen--) 8000934: 3901 subs r1, #1 8000936: b289 uxth r1, r1 8000938: 42a9 cmp r1, r5 800093a: d102 bne.n 8000942 } return ((uint16_t)ucCRCHi << 8 | ucCRCLo); 800093c: 0218 lsls r0, r3, #8 800093e: 4310 orrs r0, r2 } 8000940: bdf0 pop {r4, r5, r6, r7, pc} usIndex = ucCRCHi ^ *_pBuf++; /* 计算CRC */ 8000942: 7804 ldrb r4, [r0, #0] 8000944: 3001 adds r0, #1 ucCRCHi = ucCRCLo ^ s_CRCHi[usIndex]; 8000946: 405c eors r4, r3 8000948: 5d33 ldrb r3, [r6, r4] 800094a: 4053 eors r3, r2 ucCRCLo = s_CRCLo[usIndex]; 800094c: 5d3a ldrb r2, [r7, r4] 800094e: e7f1 b.n 8000934 8000950: 0000ffff .word 0x0000ffff 8000954: 08002358 .word 0x08002358 8000958: 08002458 .word 0x08002458 0800095c : { static uint8_t s_count = 0; uint8_t i; /* 每隔1ms进来1次 （仅用于 bsp_DelayMS） */ if (s_uiDelayCount > 0) 800095c: 4a1c ldr r2, [pc, #112] ; (80009d0 ) { 800095e: b570 push {r4, r5, r6, lr} if (s_uiDelayCount > 0) 8000960: 6813 ldr r3, [r2, #0] 8000962: 2b00 cmp r3, #0 8000964: d007 beq.n 8000976 { if (--s_uiDelayCount == 0) 8000966: 6813 ldr r3, [r2, #0] 8000968: 3b01 subs r3, #1 800096a: 6013 str r3, [r2, #0] 800096c: 2b00 cmp r3, #0 800096e: d102 bne.n 8000976 { s_ucTimeOutFlag = 1; 8000970: 2201 movs r2, #1 8000972: 4b18 ldr r3, [pc, #96] ; (80009d4 ) 8000974: 701a strb r2, [r3, #0] { 8000976: 2200 movs r2, #0 * 返 回 值: 无 ********************************************************************************************************* */ static void bsp_SoftTimerDec(SOFT_TMR *_tmr) { if (_tmr->Count > 0) 8000978: 250c movs r5, #12 { /* 如果定时器变量减到1则设置定时器到达标志 */ if (--_tmr->Count == 0) { _tmr->Flag = 1; 800097a: 2601 movs r6, #1 if (_tmr->Count > 0) 800097c: 4816 ldr r0, [pc, #88] ; (80009d8 ) 800097e: 002c movs r4, r5 8000980: 4354 muls r4, r2 8000982: 1903 adds r3, r0, r4 8000984: 6859 ldr r1, [r3, #4] 8000986: 2900 cmp r1, #0 8000988: d00a beq.n 80009a0 if (--_tmr->Count == 0) 800098a: 6859 ldr r1, [r3, #4] 800098c: 3901 subs r1, #1 800098e: 6059 str r1, [r3, #4] 8000990: 2900 cmp r1, #0 8000992: d105 bne.n 80009a0 _tmr->Flag = 1; 8000994: 705e strb r6, [r3, #1] /* 如果是自动模式，则自动重装计数器 */ if(_tmr->Mode == TMR_AUTO_MODE) 8000996: 5c21 ldrb r1, [r4, r0] 8000998: 2901 cmp r1, #1 800099a: d101 bne.n 80009a0 { _tmr->Count = _tmr->PreLoad; 800099c: 6899 ldr r1, [r3, #8] 800099e: 6059 str r1, [r3, #4] for (i = 0; i < TMR_COUNT; i++) 80009a0: 3201 adds r2, #1 80009a2: 2a04 cmp r2, #4 80009a4: d1eb bne.n 800097e g_iRunTime++; 80009a6: 4b0d ldr r3, [pc, #52] ; (80009dc ) 80009a8: 681a ldr r2, [r3, #0] 80009aa: 3201 adds r2, #1 80009ac: 601a str r2, [r3, #0] if (g_iRunTime == 0x7FFFFFFF) /* 这个变量是 int32_t 类型，最大数为 0x7FFFFFFF */ 80009ae: 6819 ldr r1, [r3, #0] 80009b0: 4a0b ldr r2, [pc, #44] ; (80009e0 ) 80009b2: 4291 cmp r1, r2 80009b4: d101 bne.n 80009ba g_iRunTime = 0; 80009b6: 2200 movs r2, #0 80009b8: 601a str r2, [r3, #0] if (++s_count >= 10) 80009ba: 4a0a ldr r2, [pc, #40] ; (80009e4 ) 80009bc: 7813 ldrb r3, [r2, #0] 80009be: 3301 adds r3, #1 80009c0: b2db uxtb r3, r3 80009c2: 2b09 cmp r3, #9 80009c4: d801 bhi.n 80009ca s_count = 0; 80009c6: 7013 strb r3, [r2, #0] } 80009c8: bd70 pop {r4, r5, r6, pc} s_count = 0; 80009ca: 2300 movs r3, #0 80009cc: e7fb b.n 80009c6 80009ce: 46c0 nop ; (mov r8, r8) 80009d0: 200001e8 .word 0x200001e8 80009d4: 200001e4 .word 0x200001e4 80009d8: 200001b4 .word 0x200001b4 80009dc: 200001ac .word 0x200001ac 80009e0: 7fffffff .word 0x7fffffff 80009e4: 200001b0 .word 0x200001b0 080009e8 : * 形 参: 无 * 返 回 值: 无 ********************************************************************************************************* */ void SysTick_Handler(void) { 80009e8: b510 push {r4, lr} SysTick_ISR(); 80009ea: f7ff ffb7 bl 800095c HAL_IncTick(); 80009ee: f000 f85f bl 8000ab0 } 80009f2: bd10 pop {r4, pc} 080009f4 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack 80009f4: 480d ldr r0, [pc, #52] ; (8000a2c ) mov sp, r0 /* set stack pointer */ 80009f6: 4685 mov sp, r0 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 80009f8: 480d ldr r0, [pc, #52] ; (8000a30 ) ldr r1, =_edata 80009fa: 490e ldr r1, [pc, #56] ; (8000a34 ) ldr r2, =_sidata 80009fc: 4a0e ldr r2, [pc, #56] ; (8000a38 ) movs r3, #0 80009fe: 2300 movs r3, #0 b LoopCopyDataInit 8000a00: e002 b.n 8000a08 08000a02 : CopyDataInit: ldr r4, [r2, r3] 8000a02: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8000a04: 50c4 str r4, [r0, r3] adds r3, r3, #4 8000a06: 3304 adds r3, #4 08000a08 : LoopCopyDataInit: adds r4, r0, r3 8000a08: 18c4 adds r4, r0, r3 cmp r4, r1 8000a0a: 428c cmp r4, r1 bcc CopyDataInit 8000a0c: d3f9 bcc.n 8000a02 /* Zero fill the bss segment. */ ldr r2, =_sbss 8000a0e: 4a0b ldr r2, [pc, #44] ; (8000a3c ) ldr r4, =_ebss 8000a10: 4c0b ldr r4, [pc, #44] ; (8000a40 ) movs r3, #0 8000a12: 2300 movs r3, #0 b LoopFillZerobss 8000a14: e001 b.n 8000a1a 08000a16 : FillZerobss: str r3, [r2] 8000a16: 6013 str r3, [r2, #0] adds r2, r2, #4 8000a18: 3204 adds r2, #4 08000a1a : LoopFillZerobss: cmp r2, r4 8000a1a: 42a2 cmp r2, r4 bcc FillZerobss 8000a1c: d3fb bcc.n 8000a16 /* Call the clock system intitialization function.*/ bl SystemInit 8000a1e: f7ff fde5 bl 80005ec /* Call static constructors */ bl __libc_init_array 8000a22: f001 fc4b bl 80022bc <__libc_init_array> /* Call the application's entry point.*/ bl main 8000a26: f7ff fcd1 bl 80003cc
08000a2a : LoopForever: b LoopForever 8000a2a: e7fe b.n 8000a2a ldr r0, =_estack 8000a2c: 20001000 .word 0x20001000 ldr r0, =_sdata 8000a30: 20000000 .word 0x20000000 ldr r1, =_edata 8000a34: 20000010 .word 0x20000010 ldr r2, =_sidata 8000a38: 08002588 .word 0x08002588 ldr r2, =_sbss 8000a3c: 20000010 .word 0x20000010 ldr r4, =_ebss 8000a40: 20000210 .word 0x20000210 08000a44 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8000a44: e7fe b.n 8000a44 ... 08000a48 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8000a48: b570 push {r4, r5, r6, lr} 8000a4a: 0005 movs r5, r0 /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000a4c: 20fa movs r0, #250 ; 0xfa 8000a4e: 4b0d ldr r3, [pc, #52] ; (8000a84 ) 8000a50: 0080 lsls r0, r0, #2 8000a52: 7819 ldrb r1, [r3, #0] 8000a54: f7ff fb6c bl 8000130 <__udivsi3> 8000a58: 4b0b ldr r3, [pc, #44] ; (8000a88 ) 8000a5a: 0001 movs r1, r0 8000a5c: 6818 ldr r0, [r3, #0] 8000a5e: f7ff fb67 bl 8000130 <__udivsi3> 8000a62: f000 f87f bl 8000b64 8000a66: 0004 movs r4, r0 { return HAL_ERROR; 8000a68: 2001 movs r0, #1 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000a6a: 2c00 cmp r4, #0 8000a6c: d109 bne.n 8000a82 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8000a6e: 2d03 cmp r5, #3 8000a70: d807 bhi.n 8000a82 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000a72: 3802 subs r0, #2 8000a74: 0022 movs r2, r4 8000a76: 0029 movs r1, r5 8000a78: f000 f83e bl 8000af8 uwTickPrio = TickPriority; 8000a7c: 0020 movs r0, r4 8000a7e: 4b03 ldr r3, [pc, #12] ; (8000a8c ) 8000a80: 601d str r5, [r3, #0] return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000a82: bd70 pop {r4, r5, r6, pc} 8000a84: 2000000a .word 0x2000000a 8000a88: 20000000 .word 0x20000000 8000a8c: 2000000c .word 0x2000000c 08000a90 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000a90: 2310 movs r3, #16 8000a92: 4a06 ldr r2, [pc, #24] ; (8000aac ) { 8000a94: b510 push {r4, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000a96: 6811 ldr r1, [r2, #0] HAL_InitTick(TICK_INT_PRIORITY); 8000a98: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000a9a: 430b orrs r3, r1 8000a9c: 6013 str r3, [r2, #0] HAL_InitTick(TICK_INT_PRIORITY); 8000a9e: f7ff ffd3 bl 8000a48 HAL_MspInit(); 8000aa2: f7ff fd49 bl 8000538 } 8000aa6: 2000 movs r0, #0 8000aa8: bd10 pop {r4, pc} 8000aaa: 46c0 nop ; (mov r8, r8) 8000aac: 40022000 .word 0x40022000 08000ab0 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 8000ab0: 4a03 ldr r2, [pc, #12] ; (8000ac0 ) 8000ab2: 4b04 ldr r3, [pc, #16] ; (8000ac4 ) 8000ab4: 6811 ldr r1, [r2, #0] 8000ab6: 781b ldrb r3, [r3, #0] 8000ab8: 185b adds r3, r3, r1 8000aba: 6013 str r3, [r2, #0] } 8000abc: 4770 bx lr 8000abe: 46c0 nop ; (mov r8, r8) 8000ac0: 200001ec .word 0x200001ec 8000ac4: 2000000a .word 0x2000000a 08000ac8 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 8000ac8: 4b01 ldr r3, [pc, #4] ; (8000ad0 ) 8000aca: 6818 ldr r0, [r3, #0] } 8000acc: 4770 bx lr 8000ace: 46c0 nop ; (mov r8, r8) 8000ad0: 200001ec .word 0x200001ec 08000ad4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8000ad4: b570 push {r4, r5, r6, lr} 8000ad6: 0004 movs r4, r0 uint32_t tickstart = HAL_GetTick(); 8000ad8: f7ff fff6 bl 8000ac8 8000adc: 0005 movs r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8000ade: 1c63 adds r3, r4, #1 8000ae0: d002 beq.n 8000ae8 { wait += (uint32_t)(uwTickFreq); 8000ae2: 4b04 ldr r3, [pc, #16] ; (8000af4 ) 8000ae4: 781b ldrb r3, [r3, #0] 8000ae6: 18e4 adds r4, r4, r3 } while((HAL_GetTick() - tickstart) < wait) 8000ae8: f7ff ffee bl 8000ac8 8000aec: 1b40 subs r0, r0, r5 8000aee: 42a0 cmp r0, r4 8000af0: d3fa bcc.n 8000ae8 { } } 8000af2: bd70 pop {r4, r5, r6, pc} 8000af4: 2000000a .word 0x2000000a 08000af8 : * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0 based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8000af8: b530 push {r4, r5, lr} */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { if ((int32_t)(IRQn) >= 0) { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000afa: 25ff movs r5, #255 ; 0xff 8000afc: 2403 movs r4, #3 8000afe: 002a movs r2, r5 8000b00: 4004 ands r4, r0 8000b02: 00e4 lsls r4, r4, #3 8000b04: 40a2 lsls r2, r4 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); 8000b06: 0189 lsls r1, r1, #6 8000b08: 4029 ands r1, r5 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b0a: 43d2 mvns r2, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); 8000b0c: 40a1 lsls r1, r4 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b0e: b2c3 uxtb r3, r0 if ((int32_t)(IRQn) >= 0) 8000b10: 2800 cmp r0, #0 8000b12: db0a blt.n 8000b2a NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b14: 24c0 movs r4, #192 ; 0xc0 8000b16: 4b0b ldr r3, [pc, #44] ; (8000b44 ) 8000b18: 0880 lsrs r0, r0, #2 8000b1a: 0080 lsls r0, r0, #2 8000b1c: 18c0 adds r0, r0, r3 8000b1e: 00a4 lsls r4, r4, #2 8000b20: 5903 ldr r3, [r0, r4] 8000b22: 401a ands r2, r3 8000b24: 4311 orrs r1, r2 8000b26: 5101 str r1, [r0, r4] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); } 8000b28: bd30 pop {r4, r5, pc} } else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b2a: 200f movs r0, #15 8000b2c: 4003 ands r3, r0 8000b2e: 3b08 subs r3, #8 8000b30: 4805 ldr r0, [pc, #20] ; (8000b48 ) 8000b32: 089b lsrs r3, r3, #2 8000b34: 009b lsls r3, r3, #2 8000b36: 181b adds r3, r3, r0 8000b38: 69d8 ldr r0, [r3, #28] 8000b3a: 4002 ands r2, r0 8000b3c: 4311 orrs r1, r2 8000b3e: 61d9 str r1, [r3, #28] 8000b40: e7f2 b.n 8000b28 8000b42: 46c0 nop ; (mov r8, r8) 8000b44: e000e100 .word 0xe000e100 8000b48: e000ed00 .word 0xe000ed00 08000b4c : if ((int32_t)(IRQn) >= 0) 8000b4c: 2800 cmp r0, #0 8000b4e: db05 blt.n 8000b5c NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8000b50: 231f movs r3, #31 8000b52: 4018 ands r0, r3 8000b54: 3b1e subs r3, #30 8000b56: 4083 lsls r3, r0 8000b58: 4a01 ldr r2, [pc, #4] ; (8000b60 ) 8000b5a: 6013 str r3, [r2, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); } 8000b5c: 4770 bx lr 8000b5e: 46c0 nop ; (mov r8, r8) 8000b60: e000e100 .word 0xe000e100 08000b64 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000b64: 2280 movs r2, #128 ; 0x80 8000b66: 1e43 subs r3, r0, #1 8000b68: 0452 lsls r2, r2, #17 { return (1UL); /* Reload value impossible */ 8000b6a: 2001 movs r0, #1 if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000b6c: 4293 cmp r3, r2 8000b6e: d20d bcs.n 8000b8c SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b70: 21c0 movs r1, #192 ; 0xc0 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8000b72: 4a07 ldr r2, [pc, #28] ; (8000b90 ) SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b74: 4807 ldr r0, [pc, #28] ; (8000b94 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8000b76: 6053 str r3, [r2, #4] SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8000b78: 6a03 ldr r3, [r0, #32] 8000b7a: 0609 lsls r1, r1, #24 8000b7c: 021b lsls r3, r3, #8 8000b7e: 0a1b lsrs r3, r3, #8 8000b80: 430b orrs r3, r1 8000b82: 6203 str r3, [r0, #32] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000b84: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8000b86: 2307 movs r3, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000b88: 6090 str r0, [r2, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8000b8a: 6013 str r3, [r2, #0] * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8000b8c: 4770 bx lr 8000b8e: 46c0 nop ; (mov r8, r8) 8000b90: e000e010 .word 0xe000e010 8000b94: e000ed00 .word 0xe000ed00 08000b98 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8000b98: b570 push {r4, r5, r6, lr} 8000b9a: 0004 movs r4, r0 uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(NULL == hdma) { return HAL_ERROR; 8000b9c: 2001 movs r0, #1 if(NULL == hdma) 8000b9e: 2c00 cmp r4, #0 8000ba0: d024 beq.n 8000bec assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8000ba2: 2302 movs r3, #2 8000ba4: 1ca5 adds r5, r4, #2 8000ba6: 77eb strb r3, [r5, #31] /* Get the CR register value */ tmp = hdma->Instance->CCR; 8000ba8: 6820 ldr r0, [r4, #0] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8000baa: 4b11 ldr r3, [pc, #68] ; (8000bf0 ) tmp = hdma->Instance->CCR; 8000bac: 6802 ldr r2, [r0, #0] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8000bae: 68a1 ldr r1, [r4, #8] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8000bb0: 401a ands r2, r3 tmp |= hdma->Init.Direction | 8000bb2: 6863 ldr r3, [r4, #4] 8000bb4: 430b orrs r3, r1 hdma->Init.PeriphInc | hdma->Init.MemInc | 8000bb6: 68e1 ldr r1, [r4, #12] 8000bb8: 430b orrs r3, r1 8000bba: 6921 ldr r1, [r4, #16] 8000bbc: 430b orrs r3, r1 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8000bbe: 6961 ldr r1, [r4, #20] 8000bc0: 430b orrs r3, r1 8000bc2: 69a1 ldr r1, [r4, #24] 8000bc4: 430b orrs r3, r1 hdma->Init.Mode | hdma->Init.Priority; 8000bc6: 69e1 ldr r1, [r4, #28] 8000bc8: 430b orrs r3, r1 tmp |= hdma->Init.Direction | 8000bca: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8000bcc: 6003 str r3, [r0, #0] hdma->DmaBaseAddress = DMA2; } #else /* calculation of the channel index */ /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U; 8000bce: 4b09 ldr r3, [pc, #36] ; (8000bf4 ) 8000bd0: 2114 movs r1, #20 8000bd2: 18c0 adds r0, r0, r3 8000bd4: f7ff faac bl 8000130 <__udivsi3> hdma->DmaBaseAddress = DMA1; 8000bd8: 4b07 ldr r3, [pc, #28] ; (8000bf8 ) hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U; 8000bda: 0080 lsls r0, r0, #2 8000bdc: 6420 str r0, [r4, #64] ; 0x40 hdma->DmaBaseAddress = DMA1; 8000bde: 63e3 str r3, [r4, #60] ; 0x3c hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000be0: 2000 movs r0, #0 hdma->State = HAL_DMA_STATE_READY; 8000be2: 2301 movs r3, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000be4: 63a0 str r0, [r4, #56] ; 0x38 hdma->Lock = HAL_UNLOCKED; 8000be6: 18e4 adds r4, r4, r3 hdma->State = HAL_DMA_STATE_READY; 8000be8: 77eb strb r3, [r5, #31] hdma->Lock = HAL_UNLOCKED; 8000bea: 77e0 strb r0, [r4, #31] } 8000bec: bd70 pop {r4, r5, r6, pc} 8000bee: 46c0 nop ; (mov r8, r8) 8000bf0: ffffc00f .word 0xffffc00f 8000bf4: bffdfff8 .word 0xbffdfff8 8000bf8: 40020000 .word 0x40020000 08000bfc : { 8000bfc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} __HAL_LOCK(hdma); 8000bfe: 1c45 adds r5, r0, #1 { 8000c00: 9301 str r3, [sp, #4] __HAL_LOCK(hdma); 8000c02: 7feb ldrb r3, [r5, #31] { 8000c04: 0004 movs r4, r0 __HAL_LOCK(hdma); 8000c06: 2002 movs r0, #2 8000c08: 2b01 cmp r3, #1 8000c0a: d027 beq.n 8000c5c 8000c0c: 2301 movs r3, #1 if(HAL_DMA_STATE_READY == hdma->State) 8000c0e: 1827 adds r7, r4, r0 __HAL_LOCK(hdma); 8000c10: 77eb strb r3, [r5, #31] if(HAL_DMA_STATE_READY == hdma->State) 8000c12: 7ffb ldrb r3, [r7, #31] 8000c14: 2600 movs r6, #0 8000c16: 469c mov ip, r3 8000c18: 4660 mov r0, ip 8000c1a: b2db uxtb r3, r3 8000c1c: 2801 cmp r0, #1 8000c1e: d128 bne.n 8000c72 hdma->State = HAL_DMA_STATE_BUSY; 8000c20: 3001 adds r0, #1 8000c22: 77f8 strb r0, [r7, #31] hdma->Instance->CCR &= ~DMA_CCR_EN; 8000c24: 6820 ldr r0, [r4, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000c26: 63a6 str r6, [r4, #56] ; 0x38 hdma->Instance->CCR &= ~DMA_CCR_EN; 8000c28: 6805 ldr r5, [r0, #0] hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); 8000c2a: 6c26 ldr r6, [r4, #64] ; 0x40 hdma->Instance->CCR &= ~DMA_CCR_EN; 8000c2c: 439d bics r5, r3 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); 8000c2e: 40b3 lsls r3, r6 hdma->Instance->CCR &= ~DMA_CCR_EN; 8000c30: 6005 str r5, [r0, #0] hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); 8000c32: 6be5 ldr r5, [r4, #60] ; 0x3c 8000c34: 606b str r3, [r5, #4] hdma->Instance->CNDTR = DataLength; 8000c36: 9b01 ldr r3, [sp, #4] 8000c38: 6043 str r3, [r0, #4] if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8000c3a: 6863 ldr r3, [r4, #4] 8000c3c: 2b10 cmp r3, #16 8000c3e: d10e bne.n 8000c5e hdma->Instance->CPAR = DstAddress; 8000c40: 6082 str r2, [r0, #8] hdma->Instance->CMAR = SrcAddress; 8000c42: 60c1 str r1, [r0, #12] if(NULL != hdma->XferHalfCpltCallback ) 8000c44: 6ae3 ldr r3, [r4, #44] ; 0x2c hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000c46: 6802 ldr r2, [r0, #0] if(NULL != hdma->XferHalfCpltCallback ) 8000c48: 2b00 cmp r3, #0 8000c4a: d00b beq.n 8000c64 hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000c4c: 230e movs r3, #14 8000c4e: 4313 orrs r3, r2 hdma->Instance->CCR &= ~DMA_IT_HT; 8000c50: 6003 str r3, [r0, #0] hdma->Instance->CCR |= DMA_CCR_EN; 8000c52: 2301 movs r3, #1 8000c54: 6802 ldr r2, [r0, #0] 8000c56: 4313 orrs r3, r2 8000c58: 6003 str r3, [r0, #0] HAL_StatusTypeDef status = HAL_OK; 8000c5a: 2000 movs r0, #0 } 8000c5c: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} hdma->Instance->CPAR = SrcAddress; 8000c5e: 6081 str r1, [r0, #8] hdma->Instance->CMAR = DstAddress; 8000c60: 60c2 str r2, [r0, #12] 8000c62: e7ef b.n 8000c44 hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); 8000c64: 230a movs r3, #10 8000c66: 4313 orrs r3, r2 hdma->Instance->CCR &= ~DMA_IT_HT; 8000c68: 2204 movs r2, #4 hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); 8000c6a: 6003 str r3, [r0, #0] hdma->Instance->CCR &= ~DMA_IT_HT; 8000c6c: 6803 ldr r3, [r0, #0] 8000c6e: 4393 bics r3, r2 8000c70: e7ee b.n 8000c50 status = HAL_BUSY; 8000c72: 2002 movs r0, #2 __HAL_UNLOCK(hdma); 8000c74: 77ee strb r6, [r5, #31] status = HAL_BUSY; 8000c76: e7f1 b.n 8000c5c 08000c78 : { 8000c78: b530 push {r4, r5, lr} if(hdma->State != HAL_DMA_STATE_BUSY) 8000c7a: 1c85 adds r5, r0, #2 8000c7c: 7feb ldrb r3, [r5, #31] 8000c7e: 1c44 adds r4, r0, #1 8000c80: 2b02 cmp r3, #2 8000c82: d005 beq.n 8000c90 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8000c84: 2304 movs r3, #4 8000c86: 6383 str r3, [r0, #56] ; 0x38 __HAL_UNLOCK(hdma); 8000c88: 2300 movs r3, #0 return HAL_ERROR; 8000c8a: 2001 movs r0, #1 __HAL_UNLOCK(hdma); 8000c8c: 77e3 strb r3, [r4, #31] } 8000c8e: bd30 pop {r4, r5, pc} hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000c90: 210e movs r1, #14 8000c92: 6803 ldr r3, [r0, #0] 8000c94: 681a ldr r2, [r3, #0] 8000c96: 438a bics r2, r1 8000c98: 601a str r2, [r3, #0] hdma->Instance->CCR &= ~DMA_CCR_EN; 8000c9a: 2201 movs r2, #1 8000c9c: 6819 ldr r1, [r3, #0] 8000c9e: 4391 bics r1, r2 8000ca0: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); 8000ca2: 6c01 ldr r1, [r0, #64] ; 0x40 8000ca4: 6bc3 ldr r3, [r0, #60] ; 0x3c 8000ca6: 0010 movs r0, r2 8000ca8: 4088 lsls r0, r1 8000caa: 6058 str r0, [r3, #4] __HAL_UNLOCK(hdma); 8000cac: 2000 movs r0, #0 hdma->State = HAL_DMA_STATE_READY; 8000cae: 77ea strb r2, [r5, #31] __HAL_UNLOCK(hdma); 8000cb0: 77e0 strb r0, [r4, #31] return HAL_OK; 8000cb2: e7ec b.n 8000c8e 08000cb4 : { 8000cb4: b570 push {r4, r5, r6, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 8000cb6: 1c84 adds r4, r0, #2 8000cb8: 7fe3 ldrb r3, [r4, #31] 8000cba: 2b02 cmp r3, #2 8000cbc: d004 beq.n 8000cc8 hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8000cbe: 2304 movs r3, #4 8000cc0: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 8000cc2: 3b03 subs r3, #3 } 8000cc4: 0018 movs r0, r3 8000cc6: bd70 pop {r4, r5, r6, pc} hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000cc8: 210e movs r1, #14 8000cca: 6803 ldr r3, [r0, #0] hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; 8000ccc: 6c05 ldr r5, [r0, #64] ; 0x40 hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000cce: 681a ldr r2, [r3, #0] 8000cd0: 438a bics r2, r1 8000cd2: 601a str r2, [r3, #0] hdma->Instance->CCR &= ~DMA_CCR_EN; 8000cd4: 2201 movs r2, #1 8000cd6: 6819 ldr r1, [r3, #0] 8000cd8: 4391 bics r1, r2 8000cda: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; 8000cdc: 0011 movs r1, r2 8000cde: 40a9 lsls r1, r5 8000ce0: 6bc3 ldr r3, [r0, #60] ; 0x3c 8000ce2: 6059 str r1, [r3, #4] hdma->State = HAL_DMA_STATE_READY; 8000ce4: 77e2 strb r2, [r4, #31] __HAL_UNLOCK(hdma); 8000ce6: 2400 movs r4, #0 8000ce8: 1883 adds r3, r0, r2 8000cea: 77dc strb r4, [r3, #31] if(hdma->XferAbortCallback != NULL) 8000cec: 6b42 ldr r2, [r0, #52] ; 0x34 HAL_StatusTypeDef status = HAL_OK; 8000cee: 0013 movs r3, r2 if(hdma->XferAbortCallback != NULL) 8000cf0: 42a2 cmp r2, r4 8000cf2: d0e7 beq.n 8000cc4 hdma->XferAbortCallback(hdma); 8000cf4: 4790 blx r2 HAL_StatusTypeDef status = HAL_OK; 8000cf6: 0023 movs r3, r4 8000cf8: e7e4 b.n 8000cc4 08000cfa : { 8000cfa: b5f8 push {r3, r4, r5, r6, r7, lr} if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) 8000cfc: 2704 movs r7, #4 8000cfe: 003e movs r6, r7 8000d00: 6c01 ldr r1, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000d02: 6bc2 ldr r2, [r0, #60] ; 0x3c if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) 8000d04: 408e lsls r6, r1 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000d06: 6815 ldr r5, [r2, #0] uint32_t source_it = hdma->Instance->CCR; 8000d08: 6803 ldr r3, [r0, #0] 8000d0a: 681c ldr r4, [r3, #0] if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) 8000d0c: 4235 tst r5, r6 8000d0e: d00d beq.n 8000d2c 8000d10: 423c tst r4, r7 8000d12: d00b beq.n 8000d2c if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000d14: 6819 ldr r1, [r3, #0] 8000d16: 0689 lsls r1, r1, #26 8000d18: d402 bmi.n 8000d20 hdma->Instance->CCR &= ~DMA_IT_HT; 8000d1a: 6819 ldr r1, [r3, #0] 8000d1c: 43b9 bics r1, r7 8000d1e: 6019 str r1, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) 8000d20: 6ac3 ldr r3, [r0, #44] ; 0x2c hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; 8000d22: 6056 str r6, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 8000d24: 2b00 cmp r3, #0 8000d26: d019 beq.n 8000d5c hdma->XferErrorCallback(hdma); 8000d28: 4798 blx r3 } 8000d2a: e017 b.n 8000d5c else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC))) 8000d2c: 2702 movs r7, #2 8000d2e: 003e movs r6, r7 8000d30: 408e lsls r6, r1 8000d32: 4235 tst r5, r6 8000d34: d013 beq.n 8000d5e 8000d36: 423c tst r4, r7 8000d38: d011 beq.n 8000d5e if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000d3a: 6819 ldr r1, [r3, #0] 8000d3c: 0689 lsls r1, r1, #26 8000d3e: d406 bmi.n 8000d4e hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); 8000d40: 240a movs r4, #10 8000d42: 6819 ldr r1, [r3, #0] 8000d44: 43a1 bics r1, r4 8000d46: 6019 str r1, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8000d48: 2101 movs r1, #1 8000d4a: 19c3 adds r3, r0, r7 8000d4c: 77d9 strb r1, [r3, #31] hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; 8000d4e: 6056 str r6, [r2, #4] __HAL_UNLOCK(hdma); 8000d50: 2200 movs r2, #0 8000d52: 1c43 adds r3, r0, #1 8000d54: 77da strb r2, [r3, #31] if(hdma->XferCpltCallback != NULL) 8000d56: 6a83 ldr r3, [r0, #40] ; 0x28 if(hdma->XferErrorCallback != NULL) 8000d58: 4293 cmp r3, r2 8000d5a: d1e5 bne.n 8000d28 } 8000d5c: bdf8 pop {r3, r4, r5, r6, r7, pc} else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8000d5e: 2608 movs r6, #8 8000d60: 0037 movs r7, r6 8000d62: 408f lsls r7, r1 8000d64: 423d tst r5, r7 8000d66: d0f9 beq.n 8000d5c 8000d68: 4234 tst r4, r6 8000d6a: d0f7 beq.n 8000d5c hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); 8000d6c: 250e movs r5, #14 8000d6e: 681c ldr r4, [r3, #0] 8000d70: 43ac bics r4, r5 8000d72: 601c str r4, [r3, #0] hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; 8000d74: 2301 movs r3, #1 8000d76: 001c movs r4, r3 8000d78: 408c lsls r4, r1 8000d7a: 6054 str r4, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 8000d7c: 1c82 adds r2, r0, #2 hdma->ErrorCode = HAL_DMA_ERROR_TE; 8000d7e: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 8000d80: 77d3 strb r3, [r2, #31] __HAL_UNLOCK(hdma); 8000d82: 2200 movs r2, #0 8000d84: 18c3 adds r3, r0, r3 8000d86: 77da strb r2, [r3, #31] if(hdma->XferErrorCallback != NULL) 8000d88: 6b03 ldr r3, [r0, #48] ; 0x30 8000d8a: e7e5 b.n 8000d58 08000d8c : return hdma->State; 8000d8c: 3002 adds r0, #2 8000d8e: 7fc0 ldrb r0, [r0, #31] 8000d90: b2c0 uxtb r0, r0 } 8000d92: 4770 bx lr 08000d94 : return hdma->ErrorCode; 8000d94: 6b80 ldr r0, [r0, #56] ; 0x38 } 8000d96: 4770 bx lr 08000d98 : */ static void FLASH_SetErrorCode(void) { uint32_t flags = 0U; if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8000d98: 4a0c ldr r2, [pc, #48] ; (8000dcc ) 8000d9a: 2110 movs r1, #16 8000d9c: 68d0 ldr r0, [r2, #12] { 8000d9e: b530 push {r4, r5, lr} if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8000da0: 0003 movs r3, r0 8000da2: 400b ands r3, r1 8000da4: 4208 tst r0, r1 8000da6: d005 beq.n 8000db4 { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8000da8: 2302 movs r3, #2 8000daa: 4809 ldr r0, [pc, #36] ; (8000dd0 ) 8000dac: 69c4 ldr r4, [r0, #28] 8000dae: 4323 orrs r3, r4 8000db0: 61c3 str r3, [r0, #28] flags |= FLASH_FLAG_WRPERR; 8000db2: 000b movs r3, r1 } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000db4: 2004 movs r0, #4 8000db6: 68d1 ldr r1, [r2, #12] 8000db8: 4201 tst r1, r0 8000dba: d005 beq.n 8000dc8 { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000dbc: 2101 movs r1, #1 8000dbe: 4c04 ldr r4, [pc, #16] ; (8000dd0 ) flags |= FLASH_FLAG_PGERR; 8000dc0: 4303 orrs r3, r0 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000dc2: 69e5 ldr r5, [r4, #28] 8000dc4: 4329 orrs r1, r5 8000dc6: 61e1 str r1, [r4, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000dc8: 60d3 str r3, [r2, #12] } 8000dca: bd30 pop {r4, r5, pc} 8000dcc: 40022000 .word 0x40022000 8000dd0: 200001f0 .word 0x200001f0 08000dd4 : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000dd4: 4b06 ldr r3, [pc, #24] ; (8000df0 ) HAL_StatusTypeDef status = HAL_OK; 8000dd6: 2000 movs r0, #0 if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000dd8: 691a ldr r2, [r3, #16] 8000dda: 0612 lsls r2, r2, #24 8000ddc: d506 bpl.n 8000dec WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8000dde: 4a05 ldr r2, [pc, #20] ; (8000df4 ) 8000de0: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8000de2: 4a05 ldr r2, [pc, #20] ; (8000df8 ) 8000de4: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000de6: 6918 ldr r0, [r3, #16] 8000de8: 0600 lsls r0, r0, #24 HAL_StatusTypeDef status = HAL_OK; 8000dea: 0fc0 lsrs r0, r0, #31 } 8000dec: 4770 bx lr 8000dee: 46c0 nop ; (mov r8, r8) 8000df0: 40022000 .word 0x40022000 8000df4: 45670123 .word 0x45670123 8000df8: cdef89ab .word 0xcdef89ab 08000dfc : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8000dfc: 2380 movs r3, #128 ; 0x80 8000dfe: 4a03 ldr r2, [pc, #12] ; (8000e0c ) } 8000e00: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8000e02: 6911 ldr r1, [r2, #16] 8000e04: 430b orrs r3, r1 8000e06: 6113 str r3, [r2, #16] } 8000e08: 4770 bx lr 8000e0a: 46c0 nop ; (mov r8, r8) 8000e0c: 40022000 .word 0x40022000 08000e10 : { 8000e10: b570 push {r4, r5, r6, lr} 8000e12: 0004 movs r4, r0 uint32_t tickstart = HAL_GetTick(); 8000e14: f7ff fe58 bl 8000ac8 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8000e18: 2601 movs r6, #1 uint32_t tickstart = HAL_GetTick(); 8000e1a: 0005 movs r5, r0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8000e1c: 4b10 ldr r3, [pc, #64] ; (8000e60 ) 8000e1e: 68da ldr r2, [r3, #12] 8000e20: 4232 tst r2, r6 8000e22: d111 bne.n 8000e48 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8000e24: 2220 movs r2, #32 8000e26: 68d9 ldr r1, [r3, #12] 8000e28: 4211 tst r1, r2 8000e2a: d000 beq.n 8000e2e __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 8000e2c: 60da str r2, [r3, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8000e2e: 68d9 ldr r1, [r3, #12] 8000e30: 2210 movs r2, #16 8000e32: 0008 movs r0, r1 8000e34: 4010 ands r0, r2 8000e36: 4211 tst r1, r2 8000e38: d102 bne.n 8000e40 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000e3a: 68db ldr r3, [r3, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8000e3c: 075b lsls r3, r3, #29 8000e3e: d508 bpl.n 8000e52 FLASH_SetErrorCode(); 8000e40: f7ff ffaa bl 8000d98 return HAL_ERROR; 8000e44: 2001 movs r0, #1 8000e46: e004 b.n 8000e52 if (Timeout != HAL_MAX_DELAY) 8000e48: 1c62 adds r2, r4, #1 8000e4a: d0e8 beq.n 8000e1e if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000e4c: 2c00 cmp r4, #0 8000e4e: d101 bne.n 8000e54 return HAL_TIMEOUT; 8000e50: 2003 movs r0, #3 } 8000e52: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000e54: f7ff fe38 bl 8000ac8 8000e58: 1b40 subs r0, r0, r5 8000e5a: 42a0 cmp r0, r4 8000e5c: d9de bls.n 8000e1c 8000e5e: e7f7 b.n 8000e50 8000e60: 40022000 .word 0x40022000 08000e64 : { 8000e64: b5f0 push {r4, r5, r6, r7, lr} 8000e66: b085 sub sp, #20 8000e68: 9303 str r3, [sp, #12] __HAL_LOCK(&pFlash); 8000e6a: 4b1c ldr r3, [pc, #112] ; (8000edc ) { 8000e6c: 9101 str r1, [sp, #4] 8000e6e: 9202 str r2, [sp, #8] __HAL_LOCK(&pFlash); 8000e70: 7e1a ldrb r2, [r3, #24] { 8000e72: 0004 movs r4, r0 __HAL_LOCK(&pFlash); 8000e74: 2002 movs r0, #2 8000e76: 2a01 cmp r2, #1 8000e78: d02e beq.n 8000ed8 8000e7a: 2201 movs r2, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000e7c: 4818 ldr r0, [pc, #96] ; (8000ee0 ) __HAL_LOCK(&pFlash); 8000e7e: 761a strb r2, [r3, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000e80: f7ff ffc6 bl 8000e10 if(status == HAL_OK) 8000e84: 2800 cmp r0, #0 8000e86: d124 bne.n 8000ed2 nbiterations = 1U; 8000e88: 0026 movs r6, r4 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8000e8a: 2c01 cmp r4, #1 8000e8c: d002 beq.n 8000e94 else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8000e8e: 2c02 cmp r4, #2 8000e90: d000 beq.n 8000e94 nbiterations = 4U; 8000e92: 2604 movs r6, #4 8000e94: 2400 movs r4, #0 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000e96: 9802 ldr r0, [sp, #8] 8000e98: 9903 ldr r1, [sp, #12] 8000e9a: 0122 lsls r2, r4, #4 8000e9c: f7ff f9d4 bl 8000248 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000ea0: 2200 movs r2, #0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000ea2: 2701 movs r7, #1 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000ea4: 4b0d ldr r3, [pc, #52] ; (8000edc ) SET_BIT(FLASH->CR, FLASH_CR_PG); 8000ea6: 4d0f ldr r5, [pc, #60] ; (8000ee4 ) pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000ea8: 61da str r2, [r3, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8000eaa: 692b ldr r3, [r5, #16] 8000eac: 9a01 ldr r2, [sp, #4] 8000eae: 433b orrs r3, r7 8000eb0: 612b str r3, [r5, #16] 8000eb2: 0063 lsls r3, r4, #1 8000eb4: 189b adds r3, r3, r2 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000eb6: b280 uxth r0, r0 *(__IO uint16_t*)Address = Data; 8000eb8: 8018 strh r0, [r3, #0] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000eba: 4809 ldr r0, [pc, #36] ; (8000ee0 ) 8000ebc: f7ff ffa8 bl 8000e10 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8000ec0: 692b ldr r3, [r5, #16] 8000ec2: 43bb bics r3, r7 8000ec4: 612b str r3, [r5, #16] if (status != HAL_OK) 8000ec6: 2800 cmp r0, #0 8000ec8: d103 bne.n 8000ed2 for (index = 0U; index < nbiterations; index++) 8000eca: 19e4 adds r4, r4, r7 8000ecc: b2e3 uxtb r3, r4 8000ece: 429e cmp r6, r3 8000ed0: d8e1 bhi.n 8000e96 __HAL_UNLOCK(&pFlash); 8000ed2: 2200 movs r2, #0 8000ed4: 4b01 ldr r3, [pc, #4] ; (8000edc ) 8000ed6: 761a strb r2, [r3, #24] } 8000ed8: b005 add sp, #20 8000eda: bdf0 pop {r4, r5, r6, r7, pc} 8000edc: 200001f0 .word 0x200001f0 8000ee0: 0000c350 .word 0x0000c350 8000ee4: 40022000 .word 0x40022000 08000ee8 : * @retval None */ static void FLASH_MassErase(void) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000ee8: 2200 movs r2, #0 8000eea: 4b06 ldr r3, [pc, #24] ; (8000f04 ) 8000eec: 61da str r2, [r3, #28] /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 8000eee: 4b06 ldr r3, [pc, #24] ; (8000f08 ) 8000ef0: 3204 adds r2, #4 8000ef2: 6919 ldr r1, [r3, #16] 8000ef4: 430a orrs r2, r1 8000ef6: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8000ef8: 2240 movs r2, #64 ; 0x40 8000efa: 6919 ldr r1, [r3, #16] 8000efc: 430a orrs r2, r1 8000efe: 611a str r2, [r3, #16] } 8000f00: 4770 bx lr 8000f02: 46c0 nop ; (mov r8, r8) 8000f04: 200001f0 .word 0x200001f0 8000f08: 40022000 .word 0x40022000 08000f0c : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000f0c: 2200 movs r2, #0 8000f0e: 4b06 ldr r3, [pc, #24] ; (8000f28 ) 8000f10: 61da str r2, [r3, #28] /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 8000f12: 4b06 ldr r3, [pc, #24] ; (8000f2c ) 8000f14: 3202 adds r2, #2 8000f16: 6919 ldr r1, [r3, #16] 8000f18: 430a orrs r2, r1 8000f1a: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); SET_BIT(FLASH->CR, FLASH_CR_STRT); 8000f1c: 2240 movs r2, #64 ; 0x40 WRITE_REG(FLASH->AR, PageAddress); 8000f1e: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8000f20: 6919 ldr r1, [r3, #16] 8000f22: 430a orrs r2, r1 8000f24: 611a str r2, [r3, #16] } 8000f26: 4770 bx lr 8000f28: 200001f0 .word 0x200001f0 8000f2c: 40022000 .word 0x40022000 08000f30 : { 8000f30: b5f8 push {r3, r4, r5, r6, r7, lr} __HAL_LOCK(&pFlash); 8000f32: 4f21 ldr r7, [pc, #132] ; (8000fb8 ) { 8000f34: 0004 movs r4, r0 __HAL_LOCK(&pFlash); 8000f36: 7e3b ldrb r3, [r7, #24] { 8000f38: 000e movs r6, r1 __HAL_LOCK(&pFlash); 8000f3a: 2002 movs r0, #2 8000f3c: 2b01 cmp r3, #1 8000f3e: d00c beq.n 8000f5a 8000f40: 2301 movs r3, #1 8000f42: 763b strb r3, [r7, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000f44: 6823 ldr r3, [r4, #0] if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000f46: 481d ldr r0, [pc, #116] ; (8000fbc ) if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000f48: 2b01 cmp r3, #1 8000f4a: d112 bne.n 8000f72 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000f4c: f7ff ff60 bl 8000e10 8000f50: 2800 cmp r0, #0 8000f52: d003 beq.n 8000f5c HAL_StatusTypeDef status = HAL_ERROR; 8000f54: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000f56: 2300 movs r3, #0 8000f58: 763b strb r3, [r7, #24] } 8000f5a: bdf8 pop {r3, r4, r5, r6, r7, pc} FLASH_MassErase(); 8000f5c: f7ff ffc4 bl 8000ee8 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000f60: 4816 ldr r0, [pc, #88] ; (8000fbc ) 8000f62: f7ff ff55 bl 8000e10 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8000f66: 2104 movs r1, #4 8000f68: 4a15 ldr r2, [pc, #84] ; (8000fc0 ) 8000f6a: 6913 ldr r3, [r2, #16] 8000f6c: 438b bics r3, r1 8000f6e: 6113 str r3, [r2, #16] 8000f70: e7f1 b.n 8000f56 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000f72: f7ff ff4d bl 8000e10 8000f76: 2800 cmp r0, #0 8000f78: d1ec bne.n 8000f54 *PageError = 0xFFFFFFFFU; 8000f7a: 2301 movs r3, #1 8000f7c: 425b negs r3, r3 8000f7e: 6033 str r3, [r6, #0] for(address = pEraseInit->PageAddress; 8000f80: 6865 ldr r5, [r4, #4] HAL_StatusTypeDef status = HAL_ERROR; 8000f82: 3001 adds r0, #1 address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8000f84: 68a3 ldr r3, [r4, #8] 8000f86: 6862 ldr r2, [r4, #4] 8000f88: 029b lsls r3, r3, #10 8000f8a: 189b adds r3, r3, r2 for(address = pEraseInit->PageAddress; 8000f8c: 42ab cmp r3, r5 8000f8e: d9e2 bls.n 8000f56 FLASH_PageErase(address); 8000f90: 0028 movs r0, r5 8000f92: f7ff ffbb bl 8000f0c status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000f96: 4809 ldr r0, [pc, #36] ; (8000fbc ) 8000f98: f7ff ff3a bl 8000e10 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000f9c: 2102 movs r1, #2 8000f9e: 4a08 ldr r2, [pc, #32] ; (8000fc0 ) 8000fa0: 6913 ldr r3, [r2, #16] 8000fa2: 438b bics r3, r1 8000fa4: 6113 str r3, [r2, #16] if (status != HAL_OK) 8000fa6: 2800 cmp r0, #0 8000fa8: d001 beq.n 8000fae *PageError = address; 8000faa: 6035 str r5, [r6, #0] break; 8000fac: e7d3 b.n 8000f56 address += FLASH_PAGE_SIZE) 8000fae: 2380 movs r3, #128 ; 0x80 8000fb0: 00db lsls r3, r3, #3 8000fb2: 18ed adds r5, r5, r3 8000fb4: e7e6 b.n 8000f84 8000fb6: 46c0 nop ; (mov r8, r8) 8000fb8: 200001f0 .word 0x200001f0 8000fbc: 0000c350 .word 0x0000c350 8000fc0: 40022000 .word 0x40022000 08000fc4 : * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { uint32_t position = 0x00u; 8000fc4: 2300 movs r3, #0 { 8000fc6: b5f0 push {r4, r5, r6, r7, lr} 8000fc8: b087 sub sp, #28 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8000fca: 680a ldr r2, [r1, #0] 8000fcc: 0014 movs r4, r2 8000fce: 40dc lsrs r4, r3 8000fd0: d101 bne.n 8000fd6 } } position++; } } 8000fd2: b007 add sp, #28 8000fd4: bdf0 pop {r4, r5, r6, r7, pc} iocurrent = (GPIO_Init->Pin) & (1uL << position); 8000fd6: 2501 movs r5, #1 8000fd8: 0014 movs r4, r2 8000fda: 409d lsls r5, r3 8000fdc: 402c ands r4, r5 8000fde: 9401 str r4, [sp, #4] if (iocurrent != 0x00u) 8000fe0: 422a tst r2, r5 8000fe2: d100 bne.n 8000fe6 8000fe4: e095 b.n 8001112 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || 8000fe6: 684a ldr r2, [r1, #4] 8000fe8: 005e lsls r6, r3, #1 8000fea: 4694 mov ip, r2 8000fec: 2203 movs r2, #3 8000fee: 4664 mov r4, ip 8000ff0: 4022 ands r2, r4 temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); 8000ff2: 2403 movs r4, #3 8000ff4: 40b4 lsls r4, r6 8000ff6: 43e4 mvns r4, r4 8000ff8: 9402 str r4, [sp, #8] if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || 8000ffa: 1e54 subs r4, r2, #1 8000ffc: 2c01 cmp r4, #1 8000ffe: d82a bhi.n 8001056 temp = GPIOx->OSPEEDR; 8001000: 6887 ldr r7, [r0, #8] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); 8001002: 9c02 ldr r4, [sp, #8] 8001004: 4027 ands r7, r4 temp |= (GPIO_Init->Speed << (position * 2u)); 8001006: 68cc ldr r4, [r1, #12] 8001008: 40b4 lsls r4, r6 800100a: 433c orrs r4, r7 GPIOx->OSPEEDR = temp; 800100c: 6084 str r4, [r0, #8] temp = GPIOx->OTYPER; 800100e: 6844 ldr r4, [r0, #4] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8001010: 2701 movs r7, #1 temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8001012: 43ac bics r4, r5 8001014: 0025 movs r5, r4 temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8001016: 4664 mov r4, ip 8001018: 0924 lsrs r4, r4, #4 800101a: 403c ands r4, r7 800101c: 409c lsls r4, r3 800101e: 432c orrs r4, r5 GPIOx->OTYPER = temp; 8001020: 6044 str r4, [r0, #4] temp = GPIOx->PUPDR; 8001022: 68c5 ldr r5, [r0, #12] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); 8001024: 9c02 ldr r4, [sp, #8] 8001026: 4025 ands r5, r4 temp |= ((GPIO_Init->Pull) << (position * 2u)); 8001028: 688c ldr r4, [r1, #8] 800102a: 40b4 lsls r4, r6 800102c: 432c orrs r4, r5 GPIOx->PUPDR = temp; 800102e: 60c4 str r4, [r0, #12] if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 8001030: 2a02 cmp r2, #2 8001032: d112 bne.n 800105a temp = GPIOx->AFR[position >> 3u]; 8001034: 08dc lsrs r4, r3, #3 temp &= ~(0xFu << ((position & 0x07u) * 4u)); 8001036: 2507 movs r5, #7 8001038: 00a4 lsls r4, r4, #2 800103a: 1904 adds r4, r0, r4 temp = GPIOx->AFR[position >> 3u]; 800103c: 6a27 ldr r7, [r4, #32] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 800103e: 9403 str r4, [sp, #12] 8001040: 240f movs r4, #15 8001042: 401d ands r5, r3 8001044: 00ad lsls r5, r5, #2 8001046: 40ac lsls r4, r5 8001048: 43a7 bics r7, r4 temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 800104a: 690c ldr r4, [r1, #16] 800104c: 40ac lsls r4, r5 800104e: 4327 orrs r7, r4 GPIOx->AFR[position >> 3u] = temp; 8001050: 9c03 ldr r4, [sp, #12] 8001052: 6227 str r7, [r4, #32] 8001054: e001 b.n 800105a if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 8001056: 2a03 cmp r2, #3 8001058: d1e3 bne.n 8001022 temp = GPIOx->MODER; 800105a: 6804 ldr r4, [r0, #0] temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); 800105c: 9d02 ldr r5, [sp, #8] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 800105e: 40b2 lsls r2, r6 temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); 8001060: 4025 ands r5, r4 8001062: 002c movs r4, r5 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 8001064: 4314 orrs r4, r2 GPIOx->MODER = temp; 8001066: 6004 str r4, [r0, #0] if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 8001068: 24c0 movs r4, #192 ; 0xc0 800106a: 4662 mov r2, ip 800106c: 02a4 lsls r4, r4, #10 800106e: 4222 tst r2, r4 8001070: d04f beq.n 8001112 __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001072: 2501 movs r5, #1 8001074: 4a28 ldr r2, [pc, #160] ; (8001118 ) temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 8001076: 2790 movs r7, #144 ; 0x90 __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001078: 6994 ldr r4, [r2, #24] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 800107a: 05ff lsls r7, r7, #23 __HAL_RCC_SYSCFG_CLK_ENABLE(); 800107c: 432c orrs r4, r5 800107e: 6194 str r4, [r2, #24] 8001080: 6992 ldr r2, [r2, #24] temp = SYSCFG->EXTICR[position >> 2u]; 8001082: 089c lsrs r4, r3, #2 __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001084: 402a ands r2, r5 8001086: 9205 str r2, [sp, #20] 8001088: 9a05 ldr r2, [sp, #20] temp = SYSCFG->EXTICR[position >> 2u]; 800108a: 4a24 ldr r2, [pc, #144] ; (800111c ) 800108c: 00a4 lsls r4, r4, #2 800108e: 18a4 adds r4, r4, r2 temp &= ~(0x0FuL << (4u * (position & 0x03u))); 8001090: 220f movs r2, #15 8001092: 3502 adds r5, #2 8001094: 401d ands r5, r3 8001096: 00ad lsls r5, r5, #2 8001098: 40aa lsls r2, r5 temp = SYSCFG->EXTICR[position >> 2u]; 800109a: 68a6 ldr r6, [r4, #8] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 800109c: 4396 bics r6, r2 temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 800109e: 2200 movs r2, #0 80010a0: 42b8 cmp r0, r7 80010a2: d00c beq.n 80010be 80010a4: 4f1e ldr r7, [pc, #120] ; (8001120 ) 80010a6: 3201 adds r2, #1 80010a8: 42b8 cmp r0, r7 80010aa: d008 beq.n 80010be 80010ac: 4f1d ldr r7, [pc, #116] ; (8001124 ) 80010ae: 3201 adds r2, #1 80010b0: 42b8 cmp r0, r7 80010b2: d004 beq.n 80010be 80010b4: 4f1c ldr r7, [pc, #112] ; (8001128 ) 80010b6: 3201 adds r2, #1 80010b8: 42b8 cmp r0, r7 80010ba: d000 beq.n 80010be 80010bc: 3202 adds r2, #2 80010be: 40aa lsls r2, r5 if((GPIO_Init->Mode & EXTI_IT) != 0x00u) 80010c0: 4667 mov r7, ip temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 80010c2: 4332 orrs r2, r6 SYSCFG->EXTICR[position >> 2u] = temp; 80010c4: 60a2 str r2, [r4, #8] temp = EXTI->IMR; 80010c6: 4a19 ldr r2, [pc, #100] ; (800112c ) temp &= ~(iocurrent); 80010c8: 9c01 ldr r4, [sp, #4] temp = EXTI->IMR; 80010ca: 6816 ldr r6, [r2, #0] temp |= iocurrent; 80010cc: 9d01 ldr r5, [sp, #4] temp &= ~(iocurrent); 80010ce: 43e4 mvns r4, r4 temp |= iocurrent; 80010d0: 4335 orrs r5, r6 if((GPIO_Init->Mode & EXTI_IT) != 0x00u) 80010d2: 03ff lsls r7, r7, #15 80010d4: d401 bmi.n 80010da temp &= ~(iocurrent); 80010d6: 0035 movs r5, r6 80010d8: 4025 ands r5, r4 if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 80010da: 4667 mov r7, ip EXTI->IMR = temp; 80010dc: 6015 str r5, [r2, #0] temp = EXTI->EMR; 80010de: 6856 ldr r6, [r2, #4] temp |= iocurrent; 80010e0: 9d01 ldr r5, [sp, #4] 80010e2: 4335 orrs r5, r6 if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 80010e4: 03bf lsls r7, r7, #14 80010e6: d401 bmi.n 80010ec temp &= ~(iocurrent); 80010e8: 0035 movs r5, r6 80010ea: 4025 ands r5, r4 if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 80010ec: 4667 mov r7, ip EXTI->EMR = temp; 80010ee: 6055 str r5, [r2, #4] temp = EXTI->RTSR; 80010f0: 6896 ldr r6, [r2, #8] temp |= iocurrent; 80010f2: 9d01 ldr r5, [sp, #4] 80010f4: 4335 orrs r5, r6 if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 80010f6: 02ff lsls r7, r7, #11 80010f8: d401 bmi.n 80010fe temp &= ~(iocurrent); 80010fa: 0035 movs r5, r6 80010fc: 4025 ands r5, r4 if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 80010fe: 4667 mov r7, ip EXTI->RTSR = temp; 8001100: 6095 str r5, [r2, #8] temp = EXTI->FTSR; 8001102: 68d5 ldr r5, [r2, #12] temp |= iocurrent; 8001104: 9e01 ldr r6, [sp, #4] 8001106: 432e orrs r6, r5 if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 8001108: 02bf lsls r7, r7, #10 800110a: d401 bmi.n 8001110 temp &= ~(iocurrent); 800110c: 4025 ands r5, r4 800110e: 002e movs r6, r5 EXTI->FTSR = temp; 8001110: 60d6 str r6, [r2, #12] position++; 8001112: 3301 adds r3, #1 8001114: e759 b.n 8000fca 8001116: 46c0 nop ; (mov r8, r8) 8001118: 40021000 .word 0x40021000 800111c: 40010000 .word 0x40010000 8001120: 48000400 .word 0x48000400 8001124: 48000800 .word 0x48000800 8001128: 48000c00 .word 0x48000c00 800112c: 40010400 .word 0x40010400 08001130 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8001130: 2a00 cmp r2, #0 8001132: d001 beq.n 8001138 { GPIOx->BSRR = (uint32_t)GPIO_Pin; 8001134: 6181 str r1, [r0, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } 8001136: 4770 bx lr GPIOx->BRR = (uint32_t)GPIO_Pin; 8001138: 6281 str r1, [r0, #40] ; 0x28 } 800113a: e7fc b.n 8001136 0800113c : * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains * the configuration information for the specified IWDG module. * @retval HAL status */ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) { 800113c: b570 push {r4, r5, r6, lr} 800113e: 0004 movs r4, r0 uint32_t tickstart; /* Check the IWDG handle allocation */ if (hiwdg == NULL) { return HAL_ERROR; 8001140: 2001 movs r0, #1 if (hiwdg == NULL) 8001142: 2c00 cmp r4, #0 8001144: d017 beq.n 8001176 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window)); /* Enable IWDG. LSI is turned on automatically */ __HAL_IWDG_START(hiwdg); 8001146: 6823 ldr r3, [r4, #0] 8001148: 4a12 ldr r2, [pc, #72] ; (8001194 ) /* Check pending flag, if previous update not done, return timeout */ tickstart = HAL_GetTick(); /* Wait for register to be updated */ while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 800114a: 2507 movs r5, #7 __HAL_IWDG_START(hiwdg); 800114c: 601a str r2, [r3, #0] IWDG_ENABLE_WRITE_ACCESS(hiwdg); 800114e: 4a12 ldr r2, [pc, #72] ; (8001198 ) 8001150: 601a str r2, [r3, #0] hiwdg->Instance->PR = hiwdg->Init.Prescaler; 8001152: 6862 ldr r2, [r4, #4] 8001154: 605a str r2, [r3, #4] hiwdg->Instance->RLR = hiwdg->Init.Reload; 8001156: 68a2 ldr r2, [r4, #8] 8001158: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 800115a: f7ff fcb5 bl 8000ac8 800115e: 0006 movs r6, r0 while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 8001160: 6823 ldr r3, [r4, #0] 8001162: 68da ldr r2, [r3, #12] 8001164: 0010 movs r0, r2 8001166: 4028 ands r0, r5 8001168: 422a tst r2, r5 800116a: d105 bne.n 8001178 } } /* If window parameter is different than current value, modify window register */ if (hiwdg->Instance->WINR != hiwdg->Init.Window) 800116c: 6919 ldr r1, [r3, #16] 800116e: 68e2 ldr r2, [r4, #12] 8001170: 4291 cmp r1, r2 8001172: d00c beq.n 800118e { /* Write to IWDG WINR the IWDG_Window value to compare with. In any case, even if window feature is disabled, Watchdog will be reloaded by writing windows register */ hiwdg->Instance->WINR = hiwdg->Init.Window; 8001174: 611a str r2, [r3, #16] __HAL_IWDG_RELOAD_COUNTER(hiwdg); } /* Return function status */ return HAL_OK; } 8001176: bd70 pop {r4, r5, r6, pc} if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 8001178: f7ff fca6 bl 8000ac8 800117c: 1b80 subs r0, r0, r6 800117e: 2827 cmp r0, #39 ; 0x27 8001180: d9ee bls.n 8001160 if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 8001182: 6823 ldr r3, [r4, #0] 8001184: 68db ldr r3, [r3, #12] 8001186: 422b tst r3, r5 8001188: d0ea beq.n 8001160 return HAL_TIMEOUT; 800118a: 2003 movs r0, #3 800118c: e7f3 b.n 8001176 __HAL_IWDG_RELOAD_COUNTER(hiwdg); 800118e: 4a03 ldr r2, [pc, #12] ; (800119c ) 8001190: 601a str r2, [r3, #0] 8001192: e7f0 b.n 8001176 8001194: 0000cccc .word 0x0000cccc 8001198: 00005555 .word 0x00005555 800119c: 0000aaaa .word 0x0000aaaa 080011a0 : * @retval HAL status */ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) { /* Reload IWDG counter with value defined in the reload register */ __HAL_IWDG_RELOAD_COUNTER(hiwdg); 80011a0: 6803 ldr r3, [r0, #0] 80011a2: 4a02 ldr r2, [pc, #8] ; (80011ac ) /* Return function status */ return HAL_OK; } 80011a4: 2000 movs r0, #0 __HAL_IWDG_RELOAD_COUNTER(hiwdg); 80011a6: 601a str r2, [r3, #0] } 80011a8: 4770 bx lr 80011aa: 46c0 nop ; (mov r8, r8) 80011ac: 0000aaaa .word 0x0000aaaa 080011b0 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80011b0: b5f0 push {r4, r5, r6, r7, lr} 80011b2: 0004 movs r4, r0 80011b4: b085 sub sp, #20 uint32_t tickstart; uint32_t pll_config; uint32_t pll_config2; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 80011b6: 2800 cmp r0, #0 80011b8: d045 beq.n 8001246 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80011ba: 6803 ldr r3, [r0, #0] 80011bc: 07db lsls r3, r3, #31 80011be: d42f bmi.n 8001220 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80011c0: 6823 ldr r3, [r4, #0] 80011c2: 079b lsls r3, r3, #30 80011c4: d500 bpl.n 80011c8 80011c6: e081 b.n 80012cc } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80011c8: 6823 ldr r3, [r4, #0] 80011ca: 071b lsls r3, r3, #28 80011cc: d500 bpl.n 80011d0 80011ce: e0bc b.n 800134a } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80011d0: 6823 ldr r3, [r4, #0] 80011d2: 075b lsls r3, r3, #29 80011d4: d500 bpl.n 80011d8 80011d6: e0df b.n 8001398 __HAL_RCC_PWR_CLK_DISABLE(); } } /*----------------------------- HSI14 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) 80011d8: 6823 ldr r3, [r4, #0] 80011da: 06db lsls r3, r3, #27 80011dc: d51a bpl.n 8001214 /* Check the parameters */ assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); /* Check the HSI14 State */ if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) 80011de: 6962 ldr r2, [r4, #20] 80011e0: 2304 movs r3, #4 80011e2: 4db5 ldr r5, [pc, #724] ; (80014b8 ) 80011e4: 2a01 cmp r2, #1 80011e6: d000 beq.n 80011ea 80011e8: e14a b.n 8001480 { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); 80011ea: 6b69 ldr r1, [r5, #52] ; 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) 80011ec: 2702 movs r7, #2 __HAL_RCC_HSI14ADC_DISABLE(); 80011ee: 430b orrs r3, r1 80011f0: 636b str r3, [r5, #52] ; 0x34 __HAL_RCC_HSI14_ENABLE(); 80011f2: 6b6b ldr r3, [r5, #52] ; 0x34 80011f4: 431a orrs r2, r3 80011f6: 636a str r2, [r5, #52] ; 0x34 tickstart = HAL_GetTick(); 80011f8: f7ff fc66 bl 8000ac8 80011fc: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) 80011fe: 6b6b ldr r3, [r5, #52] ; 0x34 8001200: 423b tst r3, r7 8001202: d100 bne.n 8001206 8001204: e135 b.n 8001472 { /* Enable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_ENABLE(); /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); 8001206: 21f8 movs r1, #248 ; 0xf8 8001208: 6b6a ldr r2, [r5, #52] ; 0x34 800120a: 69a3 ldr r3, [r4, #24] 800120c: 438a bics r2, r1 800120e: 00db lsls r3, r3, #3 8001210: 4313 orrs r3, r2 8001212: 636b str r3, [r5, #52] ; 0x34 #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8001214: 6a23 ldr r3, [r4, #32] 8001216: 2b00 cmp r3, #0 8001218: d000 beq.n 800121c 800121a: e159 b.n 80014d0 } } } } return HAL_OK; 800121c: 2000 movs r0, #0 800121e: e02a b.n 8001276 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8001220: 210c movs r1, #12 8001222: 4da5 ldr r5, [pc, #660] ; (80014b8 ) 8001224: 686a ldr r2, [r5, #4] 8001226: 400a ands r2, r1 8001228: 2a04 cmp r2, #4 800122a: d006 beq.n 800123a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 800122c: 686b ldr r3, [r5, #4] 800122e: 400b ands r3, r1 8001230: 2b08 cmp r3, #8 8001232: d10a bne.n 800124a 8001234: 686b ldr r3, [r5, #4] 8001236: 03db lsls r3, r3, #15 8001238: d507 bpl.n 800124a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800123a: 682b ldr r3, [r5, #0] 800123c: 039b lsls r3, r3, #14 800123e: d5bf bpl.n 80011c0 8001240: 6863 ldr r3, [r4, #4] 8001242: 2b00 cmp r3, #0 8001244: d1bc bne.n 80011c0 return HAL_ERROR; 8001246: 2001 movs r0, #1 8001248: e015 b.n 8001276 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800124a: 6863 ldr r3, [r4, #4] 800124c: 2b01 cmp r3, #1 800124e: d114 bne.n 800127a 8001250: 2380 movs r3, #128 ; 0x80 8001252: 682a ldr r2, [r5, #0] 8001254: 025b lsls r3, r3, #9 8001256: 4313 orrs r3, r2 8001258: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 800125a: f7ff fc35 bl 8000ac8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800125e: 2780 movs r7, #128 ; 0x80 tickstart = HAL_GetTick(); 8001260: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8001262: 02bf lsls r7, r7, #10 8001264: 682b ldr r3, [r5, #0] 8001266: 423b tst r3, r7 8001268: d1aa bne.n 80011c0 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800126a: f7ff fc2d bl 8000ac8 800126e: 1b80 subs r0, r0, r6 8001270: 2864 cmp r0, #100 ; 0x64 8001272: d9f7 bls.n 8001264 return HAL_TIMEOUT; 8001274: 2003 movs r0, #3 } 8001276: b005 add sp, #20 8001278: bdf0 pop {r4, r5, r6, r7, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800127a: 2b00 cmp r3, #0 800127c: d116 bne.n 80012ac 800127e: 682b ldr r3, [r5, #0] 8001280: 4a8e ldr r2, [pc, #568] ; (80014bc ) while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8001282: 2780 movs r7, #128 ; 0x80 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8001284: 4013 ands r3, r2 8001286: 602b str r3, [r5, #0] 8001288: 682b ldr r3, [r5, #0] 800128a: 4a8d ldr r2, [pc, #564] ; (80014c0 ) while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800128c: 02bf lsls r7, r7, #10 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800128e: 4013 ands r3, r2 8001290: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 8001292: f7ff fc19 bl 8000ac8 8001296: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8001298: 682b ldr r3, [r5, #0] 800129a: 423b tst r3, r7 800129c: d100 bne.n 80012a0 800129e: e78f b.n 80011c0 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80012a0: f7ff fc12 bl 8000ac8 80012a4: 1b80 subs r0, r0, r6 80012a6: 2864 cmp r0, #100 ; 0x64 80012a8: d9f6 bls.n 8001298 80012aa: e7e3 b.n 8001274 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80012ac: 2b05 cmp r3, #5 80012ae: d105 bne.n 80012bc 80012b0: 2380 movs r3, #128 ; 0x80 80012b2: 682a ldr r2, [r5, #0] 80012b4: 02db lsls r3, r3, #11 80012b6: 4313 orrs r3, r2 80012b8: 602b str r3, [r5, #0] 80012ba: e7c9 b.n 8001250 80012bc: 682b ldr r3, [r5, #0] 80012be: 4a7f ldr r2, [pc, #508] ; (80014bc ) 80012c0: 4013 ands r3, r2 80012c2: 602b str r3, [r5, #0] 80012c4: 682b ldr r3, [r5, #0] 80012c6: 4a7e ldr r2, [pc, #504] ; (80014c0 ) 80012c8: 4013 ands r3, r2 80012ca: e7c5 b.n 8001258 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80012cc: 220c movs r2, #12 80012ce: 4d7a ldr r5, [pc, #488] ; (80014b8 ) 80012d0: 686b ldr r3, [r5, #4] 80012d2: 4213 tst r3, r2 80012d4: d006 beq.n 80012e4 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) 80012d6: 686b ldr r3, [r5, #4] 80012d8: 4013 ands r3, r2 80012da: 2b08 cmp r3, #8 80012dc: d110 bne.n 8001300 80012de: 686b ldr r3, [r5, #4] 80012e0: 03db lsls r3, r3, #15 80012e2: d40d bmi.n 8001300 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80012e4: 682b ldr r3, [r5, #0] 80012e6: 079b lsls r3, r3, #30 80012e8: d502 bpl.n 80012f0 80012ea: 68e3 ldr r3, [r4, #12] 80012ec: 2b01 cmp r3, #1 80012ee: d1aa bne.n 8001246 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80012f0: 21f8 movs r1, #248 ; 0xf8 80012f2: 682a ldr r2, [r5, #0] 80012f4: 6923 ldr r3, [r4, #16] 80012f6: 438a bics r2, r1 80012f8: 00db lsls r3, r3, #3 80012fa: 4313 orrs r3, r2 80012fc: 602b str r3, [r5, #0] 80012fe: e763 b.n 80011c8 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8001300: 68e2 ldr r2, [r4, #12] 8001302: 2301 movs r3, #1 8001304: 2a00 cmp r2, #0 8001306: d00f beq.n 8001328 __HAL_RCC_HSI_ENABLE(); 8001308: 682a ldr r2, [r5, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800130a: 2702 movs r7, #2 __HAL_RCC_HSI_ENABLE(); 800130c: 4313 orrs r3, r2 800130e: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 8001310: f7ff fbda bl 8000ac8 8001314: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8001316: 682b ldr r3, [r5, #0] 8001318: 423b tst r3, r7 800131a: d1e9 bne.n 80012f0 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 800131c: f7ff fbd4 bl 8000ac8 8001320: 1b80 subs r0, r0, r6 8001322: 2802 cmp r0, #2 8001324: d9f7 bls.n 8001316 8001326: e7a5 b.n 8001274 __HAL_RCC_HSI_DISABLE(); 8001328: 682a ldr r2, [r5, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800132a: 2702 movs r7, #2 __HAL_RCC_HSI_DISABLE(); 800132c: 439a bics r2, r3 800132e: 602a str r2, [r5, #0] tickstart = HAL_GetTick(); 8001330: f7ff fbca bl 8000ac8 8001334: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8001336: 682b ldr r3, [r5, #0] 8001338: 423b tst r3, r7 800133a: d100 bne.n 800133e 800133c: e744 b.n 80011c8 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 800133e: f7ff fbc3 bl 8000ac8 8001342: 1b80 subs r0, r0, r6 8001344: 2802 cmp r0, #2 8001346: d9f6 bls.n 8001336 8001348: e794 b.n 8001274 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 800134a: 69e2 ldr r2, [r4, #28] 800134c: 2301 movs r3, #1 800134e: 4d5a ldr r5, [pc, #360] ; (80014b8 ) 8001350: 2a00 cmp r2, #0 8001352: d010 beq.n 8001376 __HAL_RCC_LSI_ENABLE(); 8001354: 6a6a ldr r2, [r5, #36] ; 0x24 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8001356: 2702 movs r7, #2 __HAL_RCC_LSI_ENABLE(); 8001358: 4313 orrs r3, r2 800135a: 626b str r3, [r5, #36] ; 0x24 tickstart = HAL_GetTick(); 800135c: f7ff fbb4 bl 8000ac8 8001360: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8001362: 6a6b ldr r3, [r5, #36] ; 0x24 8001364: 423b tst r3, r7 8001366: d000 beq.n 800136a 8001368: e732 b.n 80011d0 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 800136a: f7ff fbad bl 8000ac8 800136e: 1b80 subs r0, r0, r6 8001370: 2802 cmp r0, #2 8001372: d9f6 bls.n 8001362 8001374: e77e b.n 8001274 __HAL_RCC_LSI_DISABLE(); 8001376: 6a6a ldr r2, [r5, #36] ; 0x24 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8001378: 2702 movs r7, #2 __HAL_RCC_LSI_DISABLE(); 800137a: 439a bics r2, r3 800137c: 626a str r2, [r5, #36] ; 0x24 tickstart = HAL_GetTick(); 800137e: f7ff fba3 bl 8000ac8 8001382: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8001384: 6a6b ldr r3, [r5, #36] ; 0x24 8001386: 423b tst r3, r7 8001388: d100 bne.n 800138c 800138a: e721 b.n 80011d0 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 800138c: f7ff fb9c bl 8000ac8 8001390: 1b80 subs r0, r0, r6 8001392: 2802 cmp r0, #2 8001394: d9f6 bls.n 8001384 8001396: e76d b.n 8001274 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8001398: 2280 movs r2, #128 ; 0x80 FlagStatus pwrclkchanged = RESET; 800139a: 2100 movs r1, #0 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 800139c: 4d46 ldr r5, [pc, #280] ; (80014b8 ) 800139e: 0552 lsls r2, r2, #21 80013a0: 69eb ldr r3, [r5, #28] FlagStatus pwrclkchanged = RESET; 80013a2: 9100 str r1, [sp, #0] if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80013a4: 4213 tst r3, r2 80013a6: d108 bne.n 80013ba __HAL_RCC_PWR_CLK_ENABLE(); 80013a8: 69eb ldr r3, [r5, #28] 80013aa: 4313 orrs r3, r2 80013ac: 61eb str r3, [r5, #28] 80013ae: 69eb ldr r3, [r5, #28] 80013b0: 4013 ands r3, r2 80013b2: 9303 str r3, [sp, #12] 80013b4: 9b03 ldr r3, [sp, #12] pwrclkchanged = SET; 80013b6: 2301 movs r3, #1 80013b8: 9300 str r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80013ba: 2780 movs r7, #128 ; 0x80 80013bc: 4e41 ldr r6, [pc, #260] ; (80014c4 ) 80013be: 007f lsls r7, r7, #1 80013c0: 6833 ldr r3, [r6, #0] 80013c2: 423b tst r3, r7 80013c4: d006 beq.n 80013d4 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80013c6: 68a3 ldr r3, [r4, #8] 80013c8: 2b01 cmp r3, #1 80013ca: d113 bne.n 80013f4 80013cc: 6a2a ldr r2, [r5, #32] 80013ce: 4313 orrs r3, r2 80013d0: 622b str r3, [r5, #32] 80013d2: e030 b.n 8001436 SET_BIT(PWR->CR, PWR_CR_DBP); 80013d4: 6833 ldr r3, [r6, #0] 80013d6: 433b orrs r3, r7 80013d8: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 80013da: f7ff fb75 bl 8000ac8 80013de: 9001 str r0, [sp, #4] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80013e0: 6833 ldr r3, [r6, #0] 80013e2: 423b tst r3, r7 80013e4: d1ef bne.n 80013c6 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80013e6: f7ff fb6f bl 8000ac8 80013ea: 9b01 ldr r3, [sp, #4] 80013ec: 1ac0 subs r0, r0, r3 80013ee: 2864 cmp r0, #100 ; 0x64 80013f0: d9f6 bls.n 80013e0 80013f2: e73f b.n 8001274 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80013f4: 2201 movs r2, #1 80013f6: 2b00 cmp r3, #0 80013f8: d114 bne.n 8001424 80013fa: 6a2b ldr r3, [r5, #32] while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80013fc: 2702 movs r7, #2 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80013fe: 4393 bics r3, r2 8001400: 622b str r3, [r5, #32] 8001402: 6a2b ldr r3, [r5, #32] 8001404: 3203 adds r2, #3 8001406: 4393 bics r3, r2 8001408: 622b str r3, [r5, #32] tickstart = HAL_GetTick(); 800140a: f7ff fb5d bl 8000ac8 800140e: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8001410: 6a2b ldr r3, [r5, #32] 8001412: 423b tst r3, r7 8001414: d016 beq.n 8001444 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001416: f7ff fb57 bl 8000ac8 800141a: 4b2b ldr r3, [pc, #172] ; (80014c8 ) 800141c: 1b80 subs r0, r0, r6 800141e: 4298 cmp r0, r3 8001420: d9f6 bls.n 8001410 8001422: e727 b.n 8001274 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001424: 2b05 cmp r3, #5 8001426: d116 bne.n 8001456 8001428: 6a29 ldr r1, [r5, #32] 800142a: 3b01 subs r3, #1 800142c: 430b orrs r3, r1 800142e: 622b str r3, [r5, #32] 8001430: 6a2b ldr r3, [r5, #32] 8001432: 431a orrs r2, r3 8001434: 622a str r2, [r5, #32] tickstart = HAL_GetTick(); 8001436: f7ff fb47 bl 8000ac8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800143a: 2702 movs r7, #2 tickstart = HAL_GetTick(); 800143c: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800143e: 6a2b ldr r3, [r5, #32] 8001440: 423b tst r3, r7 8001442: d00f beq.n 8001464 if(pwrclkchanged == SET) 8001444: 9b00 ldr r3, [sp, #0] 8001446: 2b01 cmp r3, #1 8001448: d000 beq.n 800144c 800144a: e6c5 b.n 80011d8 __HAL_RCC_PWR_CLK_DISABLE(); 800144c: 69eb ldr r3, [r5, #28] 800144e: 4a1f ldr r2, [pc, #124] ; (80014cc ) 8001450: 4013 ands r3, r2 8001452: 61eb str r3, [r5, #28] 8001454: e6c0 b.n 80011d8 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001456: 6a2b ldr r3, [r5, #32] 8001458: 4393 bics r3, r2 800145a: 2204 movs r2, #4 800145c: 622b str r3, [r5, #32] 800145e: 6a2b ldr r3, [r5, #32] 8001460: 4393 bics r3, r2 8001462: e7b5 b.n 80013d0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001464: f7ff fb30 bl 8000ac8 8001468: 4b17 ldr r3, [pc, #92] ; (80014c8 ) 800146a: 1b80 subs r0, r0, r6 800146c: 4298 cmp r0, r3 800146e: d9e6 bls.n 800143e 8001470: e700 b.n 8001274 if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) 8001472: f7ff fb29 bl 8000ac8 8001476: 1b80 subs r0, r0, r6 8001478: 2802 cmp r0, #2 800147a: d800 bhi.n 800147e 800147c: e6bf b.n 80011fe 800147e: e6f9 b.n 8001274 else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) 8001480: 3205 adds r2, #5 8001482: d103 bne.n 800148c __HAL_RCC_HSI14ADC_ENABLE(); 8001484: 6b6a ldr r2, [r5, #52] ; 0x34 8001486: 439a bics r2, r3 8001488: 636a str r2, [r5, #52] ; 0x34 800148a: e6bc b.n 8001206 __HAL_RCC_HSI14ADC_DISABLE(); 800148c: 6b6a ldr r2, [r5, #52] ; 0x34 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) 800148e: 2702 movs r7, #2 __HAL_RCC_HSI14ADC_DISABLE(); 8001490: 4313 orrs r3, r2 __HAL_RCC_HSI14_DISABLE(); 8001492: 2201 movs r2, #1 __HAL_RCC_HSI14ADC_DISABLE(); 8001494: 636b str r3, [r5, #52] ; 0x34 __HAL_RCC_HSI14_DISABLE(); 8001496: 6b6b ldr r3, [r5, #52] ; 0x34 8001498: 4393 bics r3, r2 800149a: 636b str r3, [r5, #52] ; 0x34 tickstart = HAL_GetTick(); 800149c: f7ff fb14 bl 8000ac8 80014a0: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) 80014a2: 6b6b ldr r3, [r5, #52] ; 0x34 80014a4: 423b tst r3, r7 80014a6: d100 bne.n 80014aa 80014a8: e6b4 b.n 8001214 if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) 80014aa: f7ff fb0d bl 8000ac8 80014ae: 1b80 subs r0, r0, r6 80014b0: 2802 cmp r0, #2 80014b2: d9f6 bls.n 80014a2 80014b4: e6de b.n 8001274 80014b6: 46c0 nop ; (mov r8, r8) 80014b8: 40021000 .word 0x40021000 80014bc: fffeffff .word 0xfffeffff 80014c0: fffbffff .word 0xfffbffff 80014c4: 40007000 .word 0x40007000 80014c8: 00001388 .word 0x00001388 80014cc: efffffff .word 0xefffffff if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80014d0: 210c movs r1, #12 80014d2: 4d34 ldr r5, [pc, #208] ; (80015a4 ) 80014d4: 686a ldr r2, [r5, #4] 80014d6: 400a ands r2, r1 80014d8: 2a08 cmp r2, #8 80014da: d047 beq.n 800156c if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80014dc: 4a32 ldr r2, [pc, #200] ; (80015a8 ) 80014de: 2b02 cmp r3, #2 80014e0: d132 bne.n 8001548 __HAL_RCC_PLL_DISABLE(); 80014e2: 682b ldr r3, [r5, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80014e4: 2780 movs r7, #128 ; 0x80 __HAL_RCC_PLL_DISABLE(); 80014e6: 4013 ands r3, r2 80014e8: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 80014ea: f7ff faed bl 8000ac8 80014ee: 0006 movs r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80014f0: 04bf lsls r7, r7, #18 80014f2: 682b ldr r3, [r5, #0] 80014f4: 423b tst r3, r7 80014f6: d121 bne.n 800153c __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80014f8: 220f movs r2, #15 80014fa: 6aeb ldr r3, [r5, #44] ; 0x2c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80014fc: 2680 movs r6, #128 ; 0x80 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80014fe: 4393 bics r3, r2 8001500: 6ae2 ldr r2, [r4, #44] ; 0x2c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001502: 04b6 lsls r6, r6, #18 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8001504: 4313 orrs r3, r2 8001506: 62eb str r3, [r5, #44] ; 0x2c 8001508: 6a61 ldr r1, [r4, #36] ; 0x24 800150a: 6aa3 ldr r3, [r4, #40] ; 0x28 800150c: 686a ldr r2, [r5, #4] 800150e: 430b orrs r3, r1 8001510: 4926 ldr r1, [pc, #152] ; (80015ac ) 8001512: 400a ands r2, r1 8001514: 4313 orrs r3, r2 8001516: 606b str r3, [r5, #4] __HAL_RCC_PLL_ENABLE(); 8001518: 2380 movs r3, #128 ; 0x80 800151a: 682a ldr r2, [r5, #0] 800151c: 045b lsls r3, r3, #17 800151e: 4313 orrs r3, r2 8001520: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 8001522: f7ff fad1 bl 8000ac8 8001526: 0004 movs r4, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001528: 682b ldr r3, [r5, #0] 800152a: 4233 tst r3, r6 800152c: d000 beq.n 8001530 800152e: e675 b.n 800121c if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001530: f7ff faca bl 8000ac8 8001534: 1b00 subs r0, r0, r4 8001536: 2802 cmp r0, #2 8001538: d9f6 bls.n 8001528 800153a: e69b b.n 8001274 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 800153c: f7ff fac4 bl 8000ac8 8001540: 1b80 subs r0, r0, r6 8001542: 2802 cmp r0, #2 8001544: d9d5 bls.n 80014f2 8001546: e695 b.n 8001274 __HAL_RCC_PLL_DISABLE(); 8001548: 682b ldr r3, [r5, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800154a: 2680 movs r6, #128 ; 0x80 __HAL_RCC_PLL_DISABLE(); 800154c: 4013 ands r3, r2 800154e: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 8001550: f7ff faba bl 8000ac8 8001554: 0004 movs r4, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8001556: 04b6 lsls r6, r6, #18 8001558: 682b ldr r3, [r5, #0] 800155a: 4233 tst r3, r6 800155c: d100 bne.n 8001560 800155e: e65d b.n 800121c if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001560: f7ff fab2 bl 8000ac8 8001564: 1b00 subs r0, r0, r4 8001566: 2802 cmp r0, #2 8001568: d9f6 bls.n 8001558 800156a: e683 b.n 8001274 return HAL_ERROR; 800156c: 0018 movs r0, r3 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 800156e: 2b01 cmp r3, #1 8001570: d100 bne.n 8001574 8001572: e680 b.n 8001276 if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8001574: 2180 movs r1, #128 ; 0x80 pll_config = RCC->CFGR; 8001576: 686b ldr r3, [r5, #4] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8001578: 6a60 ldr r0, [r4, #36] ; 0x24 800157a: 0249 lsls r1, r1, #9 pll_config2 = RCC->CFGR2; 800157c: 6aea ldr r2, [r5, #44] ; 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800157e: 4019 ands r1, r3 8001580: 4281 cmp r1, r0 8001582: d000 beq.n 8001586 8001584: e65f b.n 8001246 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || 8001586: 210f movs r1, #15 8001588: 400a ands r2, r1 if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800158a: 6ae1 ldr r1, [r4, #44] ; 0x2c 800158c: 428a cmp r2, r1 800158e: d000 beq.n 8001592 8001590: e659 b.n 8001246 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 8001592: 22f0 movs r2, #240 ; 0xf0 8001594: 0392 lsls r2, r2, #14 8001596: 4013 ands r3, r2 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || 8001598: 6aa2 ldr r2, [r4, #40] ; 0x28 800159a: 4293 cmp r3, r2 800159c: d100 bne.n 80015a0 800159e: e63d b.n 800121c 80015a0: e651 b.n 8001246 80015a2: 46c0 nop ; (mov r8, r8) 80015a4: 40021000 .word 0x40021000 80015a8: feffffff .word 0xfeffffff 80015ac: ffc2ffff .word 0xffc2ffff 080015b0 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80015b0: b570 push {r4, r5, r6, lr} 80015b2: b088 sub sp, #32 const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 80015b4: 2210 movs r2, #16 80015b6: 4912 ldr r1, [pc, #72] ; (8001600 ) 80015b8: 4668 mov r0, sp 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 80015ba: ad04 add r5, sp, #16 const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 80015bc: f000 fea2 bl 8002304 const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 80015c0: 2210 movs r2, #16 80015c2: 0028 movs r0, r5 80015c4: 490f ldr r1, [pc, #60] ; (8001604 ) 80015c6: f000 fe9d bl 8002304 uint32_t sysclockfreq = 0U; tmpreg = RCC->CFGR; /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80015ca: 220c movs r2, #12 tmpreg = RCC->CFGR; 80015cc: 4e0e ldr r6, [pc, #56] ; (8001608 ) 80015ce: 6873 ldr r3, [r6, #4] switch (tmpreg & RCC_CFGR_SWS) 80015d0: 401a ands r2, r3 80015d2: 2a08 cmp r2, #8 80015d4: d111 bne.n 80015fa sysclockfreq = HSE_VALUE; break; } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; 80015d6: 200f movs r0, #15 80015d8: 466a mov r2, sp 80015da: 0c99 lsrs r1, r3, #18 80015dc: 4001 ands r1, r0 80015de: 5c54 ldrb r4, [r2, r1] prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER]; 80015e0: 6af2 ldr r2, [r6, #44] ; 0x2c 80015e2: 4002 ands r2, r0 80015e4: 5ca9 ldrb r1, [r5, r2] if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) 80015e6: 03db lsls r3, r3, #15 80015e8: d505 bpl.n 80015f6 { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 80015ea: 4808 ldr r0, [pc, #32] ; (800160c ) 80015ec: f7fe fda0 bl 8000130 <__udivsi3> #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)) /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); #else /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); 80015f0: 4360 muls r0, r4 sysclockfreq = HSI_VALUE; break; } } return sysclockfreq; } 80015f2: b008 add sp, #32 80015f4: bd70 pop {r4, r5, r6, pc} pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); 80015f6: 4806 ldr r0, [pc, #24] ; (8001610 ) 80015f8: e7fa b.n 80015f0 sysclockfreq = HSE_VALUE; 80015fa: 4804 ldr r0, [pc, #16] ; (800160c ) return sysclockfreq; 80015fc: e7f9 b.n 80015f2 80015fe: 46c0 nop ; (mov r8, r8) 8001600: 08002558 .word 0x08002558 8001604: 08002569 .word 0x08002569 8001608: 40021000 .word 0x40021000 800160c: 007a1200 .word 0x007a1200 8001610: 003d0900 .word 0x003d0900 08001614 : { 8001614: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8001616: 0004 movs r4, r0 8001618: 000e movs r6, r1 if(RCC_ClkInitStruct == NULL) 800161a: 2800 cmp r0, #0 800161c: d101 bne.n 8001622 return HAL_ERROR; 800161e: 2001 movs r0, #1 } 8001620: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} if(FLatency > __HAL_FLASH_GET_LATENCY()) 8001622: 2201 movs r2, #1 8001624: 4d37 ldr r5, [pc, #220] ; (8001704 ) 8001626: 682b ldr r3, [r5, #0] 8001628: 4013 ands r3, r2 800162a: 428b cmp r3, r1 800162c: d31c bcc.n 8001668 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 800162e: 6821 ldr r1, [r4, #0] 8001630: 078b lsls r3, r1, #30 8001632: d422 bmi.n 800167a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8001634: 07cb lsls r3, r1, #31 8001636: d42f bmi.n 8001698 if(FLatency < __HAL_FLASH_GET_LATENCY()) 8001638: 2301 movs r3, #1 800163a: 682a ldr r2, [r5, #0] 800163c: 401a ands r2, r3 800163e: 42b2 cmp r2, r6 8001640: d851 bhi.n 80016e6 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001642: 6823 ldr r3, [r4, #0] 8001644: 4d30 ldr r5, [pc, #192] ; (8001708 ) 8001646: 075b lsls r3, r3, #29 8001648: d454 bmi.n 80016f4 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; 800164a: f7ff ffb1 bl 80015b0 800164e: 686b ldr r3, [r5, #4] 8001650: 4a2e ldr r2, [pc, #184] ; (800170c ) 8001652: 061b lsls r3, r3, #24 8001654: 0f1b lsrs r3, r3, #28 8001656: 5cd3 ldrb r3, [r2, r3] 8001658: 40d8 lsrs r0, r3 800165a: 4b2d ldr r3, [pc, #180] ; (8001710 ) 800165c: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 800165e: 2003 movs r0, #3 8001660: f7ff f9f2 bl 8000a48 return HAL_OK; 8001664: 2000 movs r0, #0 8001666: e7db b.n 8001620 __HAL_FLASH_SET_LATENCY(FLatency); 8001668: 682b ldr r3, [r5, #0] 800166a: 4393 bics r3, r2 800166c: 430b orrs r3, r1 800166e: 602b str r3, [r5, #0] if(__HAL_FLASH_GET_LATENCY() != FLatency) 8001670: 682b ldr r3, [r5, #0] 8001672: 4013 ands r3, r2 8001674: 428b cmp r3, r1 8001676: d1d2 bne.n 800161e 8001678: e7d9 b.n 800162e if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800167a: 4a23 ldr r2, [pc, #140] ; (8001708 ) 800167c: 074b lsls r3, r1, #29 800167e: d504 bpl.n 800168a MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); 8001680: 23e0 movs r3, #224 ; 0xe0 8001682: 6850 ldr r0, [r2, #4] 8001684: 00db lsls r3, r3, #3 8001686: 4303 orrs r3, r0 8001688: 6053 str r3, [r2, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 800168a: 20f0 movs r0, #240 ; 0xf0 800168c: 6853 ldr r3, [r2, #4] 800168e: 4383 bics r3, r0 8001690: 68a0 ldr r0, [r4, #8] 8001692: 4303 orrs r3, r0 8001694: 6053 str r3, [r2, #4] 8001696: e7cd b.n 8001634 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8001698: 4f1b ldr r7, [pc, #108] ; (8001708 ) 800169a: 6862 ldr r2, [r4, #4] if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800169c: 683b ldr r3, [r7, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800169e: 2a01 cmp r2, #1 80016a0: d119 bne.n 80016d6 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80016a2: 039b lsls r3, r3, #14 80016a4: d5bb bpl.n 800161e __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80016a6: 2103 movs r1, #3 80016a8: 687b ldr r3, [r7, #4] 80016aa: 438b bics r3, r1 80016ac: 4313 orrs r3, r2 80016ae: 607b str r3, [r7, #4] tickstart = HAL_GetTick(); 80016b0: f7ff fa0a bl 8000ac8 80016b4: 9001 str r0, [sp, #4] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80016b6: 230c movs r3, #12 80016b8: 687a ldr r2, [r7, #4] 80016ba: 401a ands r2, r3 80016bc: 6863 ldr r3, [r4, #4] 80016be: 009b lsls r3, r3, #2 80016c0: 429a cmp r2, r3 80016c2: d0b9 beq.n 8001638 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80016c4: f7ff fa00 bl 8000ac8 80016c8: 9b01 ldr r3, [sp, #4] 80016ca: 1ac0 subs r0, r0, r3 80016cc: 4b11 ldr r3, [pc, #68] ; (8001714 ) 80016ce: 4298 cmp r0, r3 80016d0: d9f1 bls.n 80016b6 return HAL_TIMEOUT; 80016d2: 2003 movs r0, #3 80016d4: e7a4 b.n 8001620 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80016d6: 2a02 cmp r2, #2 80016d8: d102 bne.n 80016e0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80016da: 019b lsls r3, r3, #6 80016dc: d4e3 bmi.n 80016a6 80016de: e79e b.n 800161e if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80016e0: 079b lsls r3, r3, #30 80016e2: d4e0 bmi.n 80016a6 80016e4: e79b b.n 800161e __HAL_FLASH_SET_LATENCY(FLatency); 80016e6: 682a ldr r2, [r5, #0] 80016e8: 439a bics r2, r3 80016ea: 602a str r2, [r5, #0] if(__HAL_FLASH_GET_LATENCY() != FLatency) 80016ec: 682a ldr r2, [r5, #0] 80016ee: 421a tst r2, r3 80016f0: d0a7 beq.n 8001642 80016f2: e794 b.n 800161e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); 80016f4: 686b ldr r3, [r5, #4] 80016f6: 4a08 ldr r2, [pc, #32] ; (8001718 ) 80016f8: 4013 ands r3, r2 80016fa: 68e2 ldr r2, [r4, #12] 80016fc: 4313 orrs r3, r2 80016fe: 606b str r3, [r5, #4] 8001700: e7a3 b.n 800164a 8001702: 46c0 nop ; (mov r8, r8) 8001704: 40022000 .word 0x40022000 8001708: 40021000 .word 0x40021000 800170c: 08002340 .word 0x08002340 8001710: 20000000 .word 0x20000000 8001714: 00001388 .word 0x00001388 8001718: fffff8ff .word 0xfffff8ff 0800171c : * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNUMBER]); 800171c: 4b04 ldr r3, [pc, #16] ; (8001730 ) 800171e: 4a05 ldr r2, [pc, #20] ; (8001734 ) 8001720: 685b ldr r3, [r3, #4] 8001722: 055b lsls r3, r3, #21 8001724: 0f5b lsrs r3, r3, #29 8001726: 5cd3 ldrb r3, [r2, r3] 8001728: 4a03 ldr r2, [pc, #12] ; (8001738 ) 800172a: 6810 ldr r0, [r2, #0] 800172c: 40d8 lsrs r0, r3 } 800172e: 4770 bx lr 8001730: 40021000 .word 0x40021000 8001734: 08002350 .word 0x08002350 8001738: 20000000 .word 0x20000000 0800173c : * the backup registers) and RCC_BDCR register are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800173c: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*---------------------------- RTC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 800173e: 6803 ldr r3, [r0, #0] { 8001740: 0005 movs r5, r0 8001742: b085 sub sp, #20 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 8001744: 03db lsls r3, r3, #15 8001746: d52a bpl.n 800179e FlagStatus pwrclkchanged = RESET; /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8001748: 2280 movs r2, #128 ; 0x80 FlagStatus pwrclkchanged = RESET; 800174a: 2100 movs r1, #0 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 800174c: 4c38 ldr r4, [pc, #224] ; (8001830 ) 800174e: 0552 lsls r2, r2, #21 8001750: 69e3 ldr r3, [r4, #28] FlagStatus pwrclkchanged = RESET; 8001752: 9100 str r1, [sp, #0] if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8001754: 4213 tst r3, r2 8001756: d108 bne.n 800176a { __HAL_RCC_PWR_CLK_ENABLE(); 8001758: 69e3 ldr r3, [r4, #28] 800175a: 4313 orrs r3, r2 800175c: 61e3 str r3, [r4, #28] 800175e: 69e3 ldr r3, [r4, #28] 8001760: 4013 ands r3, r2 8001762: 9303 str r3, [sp, #12] 8001764: 9b03 ldr r3, [sp, #12] pwrclkchanged = SET; 8001766: 2301 movs r3, #1 8001768: 9300 str r3, [sp, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800176a: 2780 movs r7, #128 ; 0x80 800176c: 4e31 ldr r6, [pc, #196] ; (8001834 ) 800176e: 007f lsls r7, r7, #1 8001770: 6833 ldr r3, [r6, #0] 8001772: 423b tst r3, r7 8001774: d028 beq.n 80017c8 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8001776: 6a22 ldr r2, [r4, #32] 8001778: 23c0 movs r3, #192 ; 0xc0 800177a: 0011 movs r1, r2 800177c: 009b lsls r3, r3, #2 800177e: 4e2e ldr r6, [pc, #184] ; (8001838 ) 8001780: 4019 ands r1, r3 if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8001782: 421a tst r2, r3 8001784: d132 bne.n 80017ec return HAL_TIMEOUT; } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8001786: 6a23 ldr r3, [r4, #32] 8001788: 401e ands r6, r3 800178a: 686b ldr r3, [r5, #4] 800178c: 431e orrs r6, r3 /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 800178e: 9b00 ldr r3, [sp, #0] __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8001790: 6226 str r6, [r4, #32] if(pwrclkchanged == SET) 8001792: 2b01 cmp r3, #1 8001794: d103 bne.n 800179e { __HAL_RCC_PWR_CLK_DISABLE(); 8001796: 69e3 ldr r3, [r4, #28] 8001798: 4a28 ldr r2, [pc, #160] ; (800183c ) 800179a: 4013 ands r3, r2 800179c: 61e3 str r3, [r4, #28] } } /*------------------------------- USART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) 800179e: 682a ldr r2, [r5, #0] 80017a0: 07d3 lsls r3, r2, #31 80017a2: d506 bpl.n 80017b2 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); 80017a4: 2003 movs r0, #3 80017a6: 4922 ldr r1, [pc, #136] ; (8001830 ) 80017a8: 6b0b ldr r3, [r1, #48] ; 0x30 80017aa: 4383 bics r3, r0 80017ac: 68a8 ldr r0, [r5, #8] 80017ae: 4303 orrs r3, r0 80017b0: 630b str r3, [r1, #48] ; 0x30 #endif /* STM32F042x6 || STM32F048xx || */ /* STM32F051x8 || STM32F058xx || */ /* STM32F071xB || STM32F072xB || STM32F078xx || */ /* STM32F091xC || STM32F098xx */ return HAL_OK; 80017b2: 2000 movs r0, #0 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) 80017b4: 0693 lsls r3, r2, #26 80017b6: d517 bpl.n 80017e8 __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); 80017b8: 2110 movs r1, #16 80017ba: 4a1d ldr r2, [pc, #116] ; (8001830 ) 80017bc: 6b13 ldr r3, [r2, #48] ; 0x30 80017be: 438b bics r3, r1 80017c0: 68e9 ldr r1, [r5, #12] 80017c2: 430b orrs r3, r1 80017c4: 6313 str r3, [r2, #48] ; 0x30 80017c6: e00f b.n 80017e8 SET_BIT(PWR->CR, PWR_CR_DBP); 80017c8: 6833 ldr r3, [r6, #0] 80017ca: 433b orrs r3, r7 80017cc: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 80017ce: f7ff f97b bl 8000ac8 80017d2: 9001 str r0, [sp, #4] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80017d4: 6833 ldr r3, [r6, #0] 80017d6: 423b tst r3, r7 80017d8: d1cd bne.n 8001776 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80017da: f7ff f975 bl 8000ac8 80017de: 9b01 ldr r3, [sp, #4] 80017e0: 1ac0 subs r0, r0, r3 80017e2: 2864 cmp r0, #100 ; 0x64 80017e4: d9f6 bls.n 80017d4 return HAL_TIMEOUT; 80017e6: 2003 movs r0, #3 } 80017e8: b005 add sp, #20 80017ea: bdf0 pop {r4, r5, r6, r7, pc} if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80017ec: 686a ldr r2, [r5, #4] 80017ee: 4013 ands r3, r2 80017f0: 428b cmp r3, r1 80017f2: d0c8 beq.n 8001786 __HAL_RCC_BACKUPRESET_FORCE(); 80017f4: 2380 movs r3, #128 ; 0x80 temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80017f6: 6a22 ldr r2, [r4, #32] __HAL_RCC_BACKUPRESET_FORCE(); 80017f8: 6a20 ldr r0, [r4, #32] temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80017fa: 0011 movs r1, r2 __HAL_RCC_BACKUPRESET_FORCE(); 80017fc: 025b lsls r3, r3, #9 80017fe: 4303 orrs r3, r0 8001800: 6223 str r3, [r4, #32] __HAL_RCC_BACKUPRESET_RELEASE(); 8001802: 6a23 ldr r3, [r4, #32] 8001804: 480e ldr r0, [pc, #56] ; (8001840 ) temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8001806: 4031 ands r1, r6 __HAL_RCC_BACKUPRESET_RELEASE(); 8001808: 4003 ands r3, r0 800180a: 6223 str r3, [r4, #32] RCC->BDCR = temp_reg; 800180c: 6221 str r1, [r4, #32] if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 800180e: 07d3 lsls r3, r2, #31 8001810: d5b9 bpl.n 8001786 tickstart = HAL_GetTick(); 8001812: f7ff f959 bl 8000ac8 8001816: 0007 movs r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8001818: 2202 movs r2, #2 800181a: 6a23 ldr r3, [r4, #32] 800181c: 4213 tst r3, r2 800181e: d1b2 bne.n 8001786 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8001820: f7ff f952 bl 8000ac8 8001824: 4b07 ldr r3, [pc, #28] ; (8001844 ) 8001826: 1bc0 subs r0, r0, r7 8001828: 4298 cmp r0, r3 800182a: d9f5 bls.n 8001818 800182c: e7db b.n 80017e6 800182e: 46c0 nop ; (mov r8, r8) 8001830: 40021000 .word 0x40021000 8001834: 40007000 .word 0x40007000 8001838: fffffcff .word 0xfffffcff 800183c: efffffff .word 0xefffffff 8001840: fffeffff .word 0xfffeffff 8001844: 00001388 .word 0x00001388 08001848 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 8001848: b530 push {r4, r5, lr} __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 800184a: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800184e: 2201 movs r2, #1 8001850: f382 8810 msr PRIMASK, r2 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001854: 6801 ldr r1, [r0, #0] 8001856: 4d12 ldr r5, [pc, #72] ; (80018a0 ) 8001858: 680b ldr r3, [r1, #0] 800185a: 402b ands r3, r5 800185c: 600b str r3, [r1, #0] 800185e: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001862: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001866: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800186a: 6801 ldr r1, [r0, #0] 800186c: 688b ldr r3, [r1, #8] 800186e: 4393 bics r3, r2 8001870: 608b str r3, [r1, #8] 8001872: f384 8810 msr PRIMASK, r4 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8001876: 6e03 ldr r3, [r0, #96] ; 0x60 8001878: 4293 cmp r3, r2 800187a: d10a bne.n 8001892 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 800187c: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001880: f383 8810 msr PRIMASK, r3 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8001884: 2410 movs r4, #16 8001886: 6802 ldr r2, [r0, #0] 8001888: 6813 ldr r3, [r2, #0] 800188a: 43a3 bics r3, r4 800188c: 6013 str r3, [r2, #0] 800188e: f381 8810 msr PRIMASK, r1 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001892: 2320 movs r3, #32 8001894: 67c3 str r3, [r0, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8001896: 2300 movs r3, #0 8001898: 6603 str r3, [r0, #96] ; 0x60 /* Reset RxIsr function pointer */ huart->RxISR = NULL; 800189a: 6643 str r3, [r0, #100] ; 0x64 } 800189c: bd30 pop {r4, r5, pc} 800189e: 46c0 nop ; (mov r8, r8) 80018a0: fffffedf .word 0xfffffedf 080018a4 : { 80018a4: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80018a6: 0013 movs r3, r2 if (huart->gState == HAL_UART_STATE_READY) 80018a8: 6f82 ldr r2, [r0, #120] ; 0x78 { 80018aa: 0004 movs r4, r0 return HAL_BUSY; 80018ac: 2002 movs r0, #2 if (huart->gState == HAL_UART_STATE_READY) 80018ae: 2a20 cmp r2, #32 80018b0: d13a bne.n 8001928 return HAL_ERROR; 80018b2: 3801 subs r0, #1 if ((pData == NULL) || (Size == 0U)) 80018b4: 2900 cmp r1, #0 80018b6: d037 beq.n 8001928 80018b8: 2b00 cmp r3, #0 80018ba: d035 beq.n 8001928 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 80018bc: 2280 movs r2, #128 ; 0x80 80018be: 68a0 ldr r0, [r4, #8] 80018c0: 0152 lsls r2, r2, #5 80018c2: 4290 cmp r0, r2 80018c4: d106 bne.n 80018d4 80018c6: 6922 ldr r2, [r4, #16] 80018c8: 2a00 cmp r2, #0 80018ca: d103 bne.n 80018d4 if ((((uint32_t)pData) & 1U) != 0U) 80018cc: 3201 adds r2, #1 return HAL_ERROR; 80018ce: 0010 movs r0, r2 if ((((uint32_t)pData) & 1U) != 0U) 80018d0: 4211 tst r1, r2 80018d2: d129 bne.n 8001928 __HAL_LOCK(huart); 80018d4: 0025 movs r5, r4 80018d6: 3574 adds r5, #116 ; 0x74 80018d8: 782a ldrb r2, [r5, #0] return HAL_BUSY; 80018da: 2002 movs r0, #2 __HAL_LOCK(huart); 80018dc: 2a01 cmp r2, #1 80018de: d023 beq.n 8001928 80018e0: 2201 movs r2, #1 80018e2: 702a strb r2, [r5, #0] huart->TxXferSize = Size; 80018e4: 0022 movs r2, r4 80018e6: 3250 adds r2, #80 ; 0x50 huart->pTxBuffPtr = pData; 80018e8: 64e1 str r1, [r4, #76] ; 0x4c huart->ErrorCode = HAL_UART_ERROR_NONE; 80018ea: 2600 movs r6, #0 huart->TxXferSize = Size; 80018ec: 8013 strh r3, [r2, #0] huart->TxXferCount = Size; 80018ee: 8053 strh r3, [r2, #2] huart->gState = HAL_UART_STATE_BUSY_TX; 80018f0: 2221 movs r2, #33 ; 0x21 if (huart->hdmatx != NULL) 80018f2: 6ee0 ldr r0, [r4, #108] ; 0x6c huart->ErrorCode = HAL_UART_ERROR_NONE; 80018f4: 1d27 adds r7, r4, #4 80018f6: 67fe str r6, [r7, #124] ; 0x7c huart->gState = HAL_UART_STATE_BUSY_TX; 80018f8: 67a2 str r2, [r4, #120] ; 0x78 if (huart->hdmatx != NULL) 80018fa: 42b0 cmp r0, r6 80018fc: d015 beq.n 800192a if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) 80018fe: 6822 ldr r2, [r4, #0] huart->hdmatx->XferAbortCallback = NULL; 8001900: 6346 str r6, [r0, #52] ; 0x34 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) 8001902: 9201 str r2, [sp, #4] huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8001904: 4a12 ldr r2, [pc, #72] ; (8001950 ) 8001906: 6282 str r2, [r0, #40] ; 0x28 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8001908: 4a12 ldr r2, [pc, #72] ; (8001954 ) 800190a: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmatx->XferErrorCallback = UART_DMAError; 800190c: 4a12 ldr r2, [pc, #72] ; (8001958 ) 800190e: 6302 str r2, [r0, #48] ; 0x30 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) 8001910: 9a01 ldr r2, [sp, #4] 8001912: 3228 adds r2, #40 ; 0x28 8001914: f7ff f972 bl 8000bfc 8001918: 42b0 cmp r0, r6 800191a: d006 beq.n 800192a huart->ErrorCode = HAL_UART_ERROR_DMA; 800191c: 2310 movs r3, #16 return HAL_ERROR; 800191e: 2001 movs r0, #1 huart->ErrorCode = HAL_UART_ERROR_DMA; 8001920: 67fb str r3, [r7, #124] ; 0x7c huart->gState = HAL_UART_STATE_READY; 8001922: 18db adds r3, r3, r3 __HAL_UNLOCK(huart); 8001924: 702e strb r6, [r5, #0] huart->gState = HAL_UART_STATE_READY; 8001926: 67a3 str r3, [r4, #120] ; 0x78 } 8001928: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); 800192a: 2240 movs r2, #64 ; 0x40 __HAL_UNLOCK(huart); 800192c: 2000 movs r0, #0 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); 800192e: 6823 ldr r3, [r4, #0] 8001930: 621a str r2, [r3, #32] __HAL_UNLOCK(huart); 8001932: 7028 strb r0, [r5, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001934: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001938: 2301 movs r3, #1 800193a: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 800193e: 6822 ldr r2, [r4, #0] 8001940: 337f adds r3, #127 ; 0x7f 8001942: 6894 ldr r4, [r2, #8] 8001944: 4323 orrs r3, r4 8001946: 6093 str r3, [r2, #8] 8001948: f381 8810 msr PRIMASK, r1 return HAL_OK; 800194c: e7ec b.n 8001928 800194e: 46c0 nop ; (mov r8, r8) 8001950: 08001a11 .word 0x08001a11 8001954: 08001a5d .word 0x08001a5d 8001958: 08001a6d .word 0x08001a6d 0800195c : if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && 800195c: 2180 movs r1, #128 ; 0x80 800195e: 6802 ldr r2, [r0, #0] { 8001960: b570 push {r4, r5, r6, lr} const HAL_UART_StateTypeDef gstate = huart->gState; 8001962: 6f83 ldr r3, [r0, #120] ; 0x78 const HAL_UART_StateTypeDef rxstate = huart->RxState; 8001964: 6fc5 ldr r5, [r0, #124] ; 0x7c if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && 8001966: 6892 ldr r2, [r2, #8] { 8001968: 0004 movs r4, r0 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && 800196a: 420a tst r2, r1 800196c: d02b beq.n 80019c6 800196e: 2b21 cmp r3, #33 ; 0x21 8001970: d129 bne.n 80019c6 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001972: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001976: 3b20 subs r3, #32 8001978: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 800197c: 6822 ldr r2, [r4, #0] 800197e: 6893 ldr r3, [r2, #8] 8001980: 438b bics r3, r1 8001982: 6093 str r3, [r2, #8] 8001984: f380 8810 msr PRIMASK, r0 if (huart->hdmatx != NULL) 8001988: 6ee0 ldr r0, [r4, #108] ; 0x6c 800198a: 2800 cmp r0, #0 800198c: d00d beq.n 80019aa if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) 800198e: f7ff f973 bl 8000c78 8001992: 2800 cmp r0, #0 8001994: d009 beq.n 80019aa if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) 8001996: 6ee0 ldr r0, [r4, #108] ; 0x6c 8001998: f7ff f9fc bl 8000d94 800199c: 2820 cmp r0, #32 800199e: d104 bne.n 80019aa huart->ErrorCode = HAL_UART_ERROR_DMA; 80019a0: 2310 movs r3, #16 80019a2: 3404 adds r4, #4 80019a4: 67e3 str r3, [r4, #124] ; 0x7c return HAL_TIMEOUT; 80019a6: 381d subs r0, #29 } 80019a8: bd70 pop {r4, r5, r6, pc} __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 80019aa: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 80019ae: 2301 movs r3, #1 80019b0: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 80019b4: 20c0 movs r0, #192 ; 0xc0 80019b6: 6822 ldr r2, [r4, #0] 80019b8: 6813 ldr r3, [r2, #0] 80019ba: 4383 bics r3, r0 80019bc: 6013 str r3, [r2, #0] 80019be: f381 8810 msr PRIMASK, r1 huart->gState = HAL_UART_STATE_READY; 80019c2: 2320 movs r3, #32 80019c4: 67a3 str r3, [r4, #120] ; 0x78 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && 80019c6: 2140 movs r1, #64 ; 0x40 80019c8: 6823 ldr r3, [r4, #0] return HAL_OK; 80019ca: 2000 movs r0, #0 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && 80019cc: 689b ldr r3, [r3, #8] 80019ce: 420b tst r3, r1 80019d0: d0ea beq.n 80019a8 80019d2: 2d22 cmp r5, #34 ; 0x22 80019d4: d1e8 bne.n 80019a8 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 80019d6: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 80019da: 2301 movs r3, #1 80019dc: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80019e0: 6822 ldr r2, [r4, #0] 80019e2: 6893 ldr r3, [r2, #8] 80019e4: 438b bics r3, r1 80019e6: 6093 str r3, [r2, #8] 80019e8: f380 8810 msr PRIMASK, r0 if (huart->hdmarx != NULL) 80019ec: 6f20 ldr r0, [r4, #112] ; 0x70 80019ee: 2800 cmp r0, #0 80019f0: d008 beq.n 8001a04 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) 80019f2: f7ff f941 bl 8000c78 80019f6: 2800 cmp r0, #0 80019f8: d004 beq.n 8001a04 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) 80019fa: 6f20 ldr r0, [r4, #112] ; 0x70 80019fc: f7ff f9ca bl 8000d94 8001a00: 2820 cmp r0, #32 8001a02: d0cd beq.n 80019a0 UART_EndRxTransfer(huart); 8001a04: 0020 movs r0, r4 8001a06: f7ff ff1f bl 8001848 return HAL_OK; 8001a0a: 2000 movs r0, #0 8001a0c: e7cc b.n 80019a8 08001a0e : 8001a0e: 4770 bx lr 08001a10 : * @brief DMA UART transmit process complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { 8001a10: 0003 movs r3, r0 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); /* DMA Normal mode */ if (hdma->Init.Mode != DMA_CIRCULAR) 8001a12: 699b ldr r3, [r3, #24] { 8001a14: b570 push {r4, r5, r6, lr} UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8001a16: 6a40 ldr r0, [r0, #36] ; 0x24 if (hdma->Init.Mode != DMA_CIRCULAR) 8001a18: 2b20 cmp r3, #32 8001a1a: d01b beq.n 8001a54 { huart->TxXferCount = 0U; 8001a1c: 0003 movs r3, r0 8001a1e: 2200 movs r2, #0 8001a20: 3352 adds r3, #82 ; 0x52 8001a22: 801a strh r2, [r3, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001a24: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001a28: 3201 adds r2, #1 8001a2a: f382 8810 msr PRIMASK, r2 /* Disable the DMA transfer for transmit request by resetting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8001a2e: 2580 movs r5, #128 ; 0x80 8001a30: 6801 ldr r1, [r0, #0] 8001a32: 688b ldr r3, [r1, #8] 8001a34: 43ab bics r3, r5 8001a36: 608b str r3, [r1, #8] 8001a38: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001a3c: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001a40: f382 8810 msr PRIMASK, r2 /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8001a44: 2340 movs r3, #64 ; 0x40 8001a46: 6802 ldr r2, [r0, #0] 8001a48: 6810 ldr r0, [r2, #0] 8001a4a: 4303 orrs r3, r0 8001a4c: 6013 str r3, [r2, #0] 8001a4e: f381 8810 msr PRIMASK, r1 #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 8001a52: bd70 pop {r4, r5, r6, pc} HAL_UART_TxCpltCallback(huart); 8001a54: f7ff ffdb bl 8001a0e } 8001a58: e7fb b.n 8001a52 08001a5a : 8001a5a: 4770 bx lr 08001a5c : * @brief DMA UART transmit process half complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { 8001a5c: b510 push {r4, lr} #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx Half complete callback*/ huart->TxHalfCpltCallback(huart); #else /*Call legacy weak Tx Half complete callback*/ HAL_UART_TxHalfCpltCallback(huart); 8001a5e: 6a40 ldr r0, [r0, #36] ; 0x24 8001a60: f7ff fffb bl 8001a5a #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8001a64: bd10 pop {r4, pc} 08001a66 : 8001a66: 4770 bx lr 08001a68 : 8001a68: 4770 bx lr 08001a6a : 8001a6a: 4770 bx lr 08001a6c : * @brief DMA UART communication error callback. * @param hdma DMA handle. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { 8001a6c: b570 push {r4, r5, r6, lr} UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8001a6e: 6a44 ldr r4, [r0, #36] ; 0x24 const HAL_UART_StateTypeDef gstate = huart->gState; const HAL_UART_StateTypeDef rxstate = huart->RxState; /* Stop UART DMA Tx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && 8001a70: 6822 ldr r2, [r4, #0] const HAL_UART_StateTypeDef gstate = huart->gState; 8001a72: 6fa3 ldr r3, [r4, #120] ; 0x78 const HAL_UART_StateTypeDef rxstate = huart->RxState; 8001a74: 6fe1 ldr r1, [r4, #124] ; 0x7c if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && 8001a76: 6892 ldr r2, [r2, #8] 8001a78: 0612 lsls r2, r2, #24 8001a7a: d513 bpl.n 8001aa4 8001a7c: 2b21 cmp r3, #33 ; 0x21 8001a7e: d111 bne.n 8001aa4 (gstate == HAL_UART_STATE_BUSY_TX)) { huart->TxXferCount = 0U; 8001a80: 0023 movs r3, r4 8001a82: 2200 movs r2, #0 8001a84: 3352 adds r3, #82 ; 0x52 8001a86: 801a strh r2, [r3, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001a88: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001a8c: 2301 movs r3, #1 8001a8e: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001a92: 25c0 movs r5, #192 ; 0xc0 8001a94: 6822 ldr r2, [r4, #0] 8001a96: 6813 ldr r3, [r2, #0] 8001a98: 43ab bics r3, r5 8001a9a: 6013 str r3, [r2, #0] 8001a9c: f380 8810 msr PRIMASK, r0 huart->gState = HAL_UART_STATE_READY; 8001aa0: 2320 movs r3, #32 8001aa2: 67a3 str r3, [r4, #120] ; 0x78 UART_EndTxTransfer(huart); } /* Stop UART DMA Rx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && 8001aa4: 6823 ldr r3, [r4, #0] 8001aa6: 689b ldr r3, [r3, #8] 8001aa8: 065b lsls r3, r3, #25 8001aaa: d508 bpl.n 8001abe 8001aac: 2922 cmp r1, #34 ; 0x22 8001aae: d106 bne.n 8001abe (rxstate == HAL_UART_STATE_BUSY_RX)) { huart->RxXferCount = 0U; 8001ab0: 0023 movs r3, r4 8001ab2: 2200 movs r2, #0 8001ab4: 335a adds r3, #90 ; 0x5a UART_EndRxTransfer(huart); 8001ab6: 0020 movs r0, r4 huart->RxXferCount = 0U; 8001ab8: 801a strh r2, [r3, #0] UART_EndRxTransfer(huart); 8001aba: f7ff fec5 bl 8001848 } huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001abe: 2310 movs r3, #16 8001ac0: 1d22 adds r2, r4, #4 8001ac2: 6fd1 ldr r1, [r2, #124] ; 0x7c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8001ac4: 0020 movs r0, r4 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001ac6: 430b orrs r3, r1 8001ac8: 67d3 str r3, [r2, #124] ; 0x7c HAL_UART_ErrorCallback(huart); 8001aca: f7ff ffce bl 8001a6a #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8001ace: bd70 pop {r4, r5, r6, pc} 08001ad0 : * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8001ad0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0U; 8001ad2: 2300 movs r3, #0 8001ad4: 0002 movs r2, r0 { 8001ad6: b510 push {r4, lr} huart->RxXferCount = 0U; 8001ad8: 325a adds r2, #90 ; 0x5a 8001ada: 8013 strh r3, [r2, #0] huart->TxXferCount = 0U; 8001adc: 3a08 subs r2, #8 8001ade: 8013 strh r3, [r2, #0] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8001ae0: f7ff ffc3 bl 8001a6a #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8001ae4: bd10 pop {r4, pc} 08001ae6 : } 8001ae6: 4770 bx lr 08001ae8 : uint32_t isrflags = READ_REG(huart->Instance->ISR); 8001ae8: 6801 ldr r1, [r0, #0] { 8001aea: b5f8 push {r3, r4, r5, r6, r7, lr} uint32_t isrflags = READ_REG(huart->Instance->ISR); 8001aec: 69cb ldr r3, [r1, #28] errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); 8001aee: 4d9f ldr r5, [pc, #636] ; (8001d6c ) { 8001af0: 0004 movs r4, r0 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001af2: 6808 ldr r0, [r1, #0] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001af4: 688a ldr r2, [r1, #8] if (errorflags == 0U) 8001af6: 422b tst r3, r5 8001af8: d10b bne.n 8001b12 if (((isrflags & USART_ISR_RXNE) != 0U) 8001afa: 2220 movs r2, #32 8001afc: 4213 tst r3, r2 8001afe: d100 bne.n 8001b02 8001b00: e07e b.n 8001c00 && ((cr1its & USART_CR1_RXNEIE) != 0U)) 8001b02: 4210 tst r0, r2 8001b04: d100 bne.n 8001b08 8001b06: e07b b.n 8001c00 if (huart->RxISR != NULL) 8001b08: 6e63 ldr r3, [r4, #100] ; 0x64 huart->TxISR(huart); 8001b0a: 0020 movs r0, r4 if (huart->TxISR != NULL) 8001b0c: 2b00 cmp r3, #0 8001b0e: d16d bne.n 8001bec 8001b10: e06d b.n 8001bee && (((cr3its & USART_CR3_EIE) != 0U) 8001b12: 2601 movs r6, #1 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) 8001b14: 4d96 ldr r5, [pc, #600] ; (8001d70 ) && (((cr3its & USART_CR3_EIE) != 0U) 8001b16: 4032 ands r2, r6 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) 8001b18: 4005 ands r5, r0 8001b1a: 4315 orrs r5, r2 8001b1c: d100 bne.n 8001b20 8001b1e: e06f b.n 8001c00 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) 8001b20: 1d25 adds r5, r4, #4 8001b22: 4233 tst r3, r6 8001b24: d005 beq.n 8001b32 8001b26: 05c7 lsls r7, r0, #23 8001b28: d503 bpl.n 8001b32 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 8001b2a: 620e str r6, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; 8001b2c: 6fef ldr r7, [r5, #124] ; 0x7c 8001b2e: 433e orrs r6, r7 8001b30: 67ee str r6, [r5, #124] ; 0x7c if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8001b32: 2602 movs r6, #2 8001b34: 4233 tst r3, r6 8001b36: d006 beq.n 8001b46 8001b38: 2a00 cmp r2, #0 8001b3a: d004 beq.n 8001b46 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 8001b3c: 620e str r6, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; 8001b3e: 6fef ldr r7, [r5, #124] ; 0x7c 8001b40: 19b6 adds r6, r6, r6 8001b42: 433e orrs r6, r7 8001b44: 67ee str r6, [r5, #124] ; 0x7c if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8001b46: 2604 movs r6, #4 8001b48: 4233 tst r3, r6 8001b4a: d006 beq.n 8001b5a 8001b4c: 2a00 cmp r2, #0 8001b4e: d004 beq.n 8001b5a __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); 8001b50: 620e str r6, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; 8001b52: 6fef ldr r7, [r5, #124] ; 0x7c 8001b54: 3e02 subs r6, #2 8001b56: 433e orrs r6, r7 8001b58: 67ee str r6, [r5, #124] ; 0x7c if (((isrflags & USART_ISR_ORE) != 0U) 8001b5a: 2608 movs r6, #8 8001b5c: 4233 tst r3, r6 8001b5e: d007 beq.n 8001b70 && (((cr1its & USART_CR1_RXNEIE) != 0U) || 8001b60: 2720 movs r7, #32 8001b62: 4007 ands r7, r0 8001b64: 433a orrs r2, r7 8001b66: d003 beq.n 8001b70 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 8001b68: 620e str r6, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; 8001b6a: 6fea ldr r2, [r5, #124] ; 0x7c 8001b6c: 4316 orrs r6, r2 8001b6e: 67ee str r6, [r5, #124] ; 0x7c if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) 8001b70: 2280 movs r2, #128 ; 0x80 8001b72: 0112 lsls r2, r2, #4 8001b74: 4213 tst r3, r2 8001b76: d006 beq.n 8001b86 8001b78: 0146 lsls r6, r0, #5 8001b7a: d504 bpl.n 8001b86 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); 8001b7c: 620a str r2, [r1, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; 8001b7e: 2220 movs r2, #32 8001b80: 6fe9 ldr r1, [r5, #124] ; 0x7c 8001b82: 430a orrs r2, r1 8001b84: 67ea str r2, [r5, #124] ; 0x7c if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8001b86: 6fea ldr r2, [r5, #124] ; 0x7c 8001b88: 2a00 cmp r2, #0 8001b8a: d030 beq.n 8001bee if (((isrflags & USART_ISR_RXNE) != 0U) 8001b8c: 2220 movs r2, #32 8001b8e: 4213 tst r3, r2 8001b90: d006 beq.n 8001ba0 && ((cr1its & USART_CR1_RXNEIE) != 0U)) 8001b92: 4210 tst r0, r2 8001b94: d004 beq.n 8001ba0 if (huart->RxISR != NULL) 8001b96: 6e63 ldr r3, [r4, #100] ; 0x64 8001b98: 2b00 cmp r3, #0 8001b9a: d001 beq.n 8001ba0 huart->RxISR(huart); 8001b9c: 0020 movs r0, r4 8001b9e: 4798 blx r3 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8001ba0: 6822 ldr r2, [r4, #0] errorcode = huart->ErrorCode; 8001ba2: 6feb ldr r3, [r5, #124] ; 0x7c if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8001ba4: 2740 movs r7, #64 ; 0x40 8001ba6: 6896 ldr r6, [r2, #8] ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) 8001ba8: 2228 movs r2, #40 ; 0x28 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8001baa: 403e ands r6, r7 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) 8001bac: 4013 ands r3, r2 UART_EndRxTransfer(huart); 8001bae: 0020 movs r0, r4 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8001bb0: 431e orrs r6, r3 8001bb2: d021 beq.n 8001bf8 UART_EndRxTransfer(huart); 8001bb4: f7ff fe48 bl 8001848 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8001bb8: 6823 ldr r3, [r4, #0] 8001bba: 689b ldr r3, [r3, #8] 8001bbc: 423b tst r3, r7 8001bbe: d017 beq.n 8001bf0 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001bc0: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001bc4: 2301 movs r3, #1 8001bc6: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001bca: 6822 ldr r2, [r4, #0] 8001bcc: 6893 ldr r3, [r2, #8] 8001bce: 43bb bics r3, r7 8001bd0: 6093 str r3, [r2, #8] 8001bd2: f381 8810 msr PRIMASK, r1 if (huart->hdmarx != NULL) 8001bd6: 6f20 ldr r0, [r4, #112] ; 0x70 8001bd8: 2800 cmp r0, #0 8001bda: d009 beq.n 8001bf0 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8001bdc: 4b65 ldr r3, [pc, #404] ; (8001d74 ) 8001bde: 6343 str r3, [r0, #52] ; 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8001be0: f7ff f868 bl 8000cb4 8001be4: 2800 cmp r0, #0 8001be6: d002 beq.n 8001bee huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001be8: 6f20 ldr r0, [r4, #112] ; 0x70 8001bea: 6b43 ldr r3, [r0, #52] ; 0x34 8001bec: 4798 blx r3 } 8001bee: bdf8 pop {r3, r4, r5, r6, r7, pc} HAL_UART_ErrorCallback(huart); 8001bf0: 0020 movs r0, r4 8001bf2: f7ff ff3a bl 8001a6a 8001bf6: e7fa b.n 8001bee HAL_UART_ErrorCallback(huart); 8001bf8: f7ff ff37 bl 8001a6a huart->ErrorCode = HAL_UART_ERROR_NONE; 8001bfc: 67ee str r6, [r5, #124] ; 0x7c 8001bfe: e7f6 b.n 8001bee if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8001c00: 6e22 ldr r2, [r4, #96] ; 0x60 8001c02: 2a01 cmp r2, #1 8001c04: d000 beq.n 8001c08 8001c06: e090 b.n 8001d2a && ((isrflags & USART_ISR_IDLE) != 0U) 8001c08: 2510 movs r5, #16 8001c0a: 422b tst r3, r5 8001c0c: d100 bne.n 8001c10 8001c0e: e08c b.n 8001d2a && ((cr1its & USART_ISR_IDLE) != 0U)) 8001c10: 4228 tst r0, r5 8001c12: d100 bne.n 8001c16 8001c14: e089 b.n 8001d2a __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); 8001c16: 620d str r5, [r1, #32] if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8001c18: 688b ldr r3, [r1, #8] 8001c1a: 2140 movs r1, #64 ; 0x40 8001c1c: 0018 movs r0, r3 8001c1e: 4008 ands r0, r1 8001c20: 420b tst r3, r1 8001c22: d04c beq.n 8001cbe uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 8001c24: 6f20 ldr r0, [r4, #112] ; 0x70 8001c26: 6803 ldr r3, [r0, #0] 8001c28: 685b ldr r3, [r3, #4] 8001c2a: b29b uxth r3, r3 if ((nb_remaining_rx_data > 0U) 8001c2c: 2b00 cmp r3, #0 8001c2e: d0de beq.n 8001bee && (nb_remaining_rx_data < huart->RxXferSize)) 8001c30: 0026 movs r6, r4 8001c32: 3658 adds r6, #88 ; 0x58 8001c34: 8837 ldrh r7, [r6, #0] 8001c36: 429f cmp r7, r3 8001c38: d9d9 bls.n 8001bee huart->RxXferCount = nb_remaining_rx_data; 8001c3a: 0027 movs r7, r4 8001c3c: 375a adds r7, #90 ; 0x5a 8001c3e: 803b strh r3, [r7, #0] if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 8001c40: 6983 ldr r3, [r0, #24] 8001c42: 2b20 cmp r3, #32 8001c44: d031 beq.n 8001caa __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001c46: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001c4a: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001c4e: 6820 ldr r0, [r4, #0] 8001c50: 4d49 ldr r5, [pc, #292] ; (8001d78 ) 8001c52: 6803 ldr r3, [r0, #0] 8001c54: 402b ands r3, r5 8001c56: 6003 str r3, [r0, #0] 8001c58: f387 8810 msr PRIMASK, r7 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001c5c: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001c60: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001c64: 6820 ldr r0, [r4, #0] 8001c66: 6883 ldr r3, [r0, #8] 8001c68: 4393 bics r3, r2 8001c6a: 6083 str r3, [r0, #8] 8001c6c: f387 8810 msr PRIMASK, r7 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001c70: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001c74: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001c78: 6820 ldr r0, [r4, #0] 8001c7a: 6883 ldr r3, [r0, #8] 8001c7c: 438b bics r3, r1 8001c7e: 6083 str r3, [r0, #8] 8001c80: f387 8810 msr PRIMASK, r7 huart->RxState = HAL_UART_STATE_READY; 8001c84: 2320 movs r3, #32 8001c86: 67e3 str r3, [r4, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8001c88: 2300 movs r3, #0 8001c8a: 6623 str r3, [r4, #96] ; 0x60 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001c8c: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001c90: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8001c94: 6822 ldr r2, [r4, #0] 8001c96: 3512 adds r5, #18 8001c98: 6813 ldr r3, [r2, #0] 8001c9a: 35ff adds r5, #255 ; 0xff 8001c9c: 43ab bics r3, r5 8001c9e: 6013 str r3, [r2, #0] 8001ca0: f381 8810 msr PRIMASK, r1 (void)HAL_DMA_Abort(huart->hdmarx); 8001ca4: 6f20 ldr r0, [r4, #112] ; 0x70 8001ca6: f7fe ffe7 bl 8000c78 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8001caa: 0023 movs r3, r4 8001cac: 335a adds r3, #90 ; 0x5a 8001cae: 881b ldrh r3, [r3, #0] 8001cb0: 8831 ldrh r1, [r6, #0] 8001cb2: 1ac9 subs r1, r1, r3 8001cb4: b289 uxth r1, r1 HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8001cb6: 0020 movs r0, r4 8001cb8: f7ff ff15 bl 8001ae6 8001cbc: e797 b.n 8001bee uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8001cbe: 0026 movs r6, r4 8001cc0: 365a adds r6, #90 ; 0x5a 8001cc2: 8833 ldrh r3, [r6, #0] if ((huart->RxXferCount > 0U) 8001cc4: 8831 ldrh r1, [r6, #0] uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8001cc6: b29b uxth r3, r3 if ((huart->RxXferCount > 0U) 8001cc8: 2900 cmp r1, #0 8001cca: d100 bne.n 8001cce 8001ccc: e78f b.n 8001bee uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8001cce: 0021 movs r1, r4 8001cd0: 3158 adds r1, #88 ; 0x58 8001cd2: 8809 ldrh r1, [r1, #0] 8001cd4: 1ac9 subs r1, r1, r3 8001cd6: b289 uxth r1, r1 && (nb_rx_data > 0U)) 8001cd8: 2900 cmp r1, #0 8001cda: d100 bne.n 8001cde 8001cdc: e787 b.n 8001bee __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001cde: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001ce2: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001ce6: 6826 ldr r6, [r4, #0] 8001ce8: 4d24 ldr r5, [pc, #144] ; (8001d7c ) 8001cea: 6833 ldr r3, [r6, #0] 8001cec: 402b ands r3, r5 8001cee: 6033 str r3, [r6, #0] 8001cf0: f387 8810 msr PRIMASK, r7 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001cf4: f3ef 8710 mrs r7, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001cf8: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001cfc: 6826 ldr r6, [r4, #0] 8001cfe: 68b3 ldr r3, [r6, #8] 8001d00: 4393 bics r3, r2 8001d02: 60b3 str r3, [r6, #8] 8001d04: f387 8810 msr PRIMASK, r7 huart->RxState = HAL_UART_STATE_READY; 8001d08: 2320 movs r3, #32 huart->RxISR = NULL; 8001d0a: 6660 str r0, [r4, #100] ; 0x64 huart->RxState = HAL_UART_STATE_READY; 8001d0c: 67e3 str r3, [r4, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8001d0e: 6620 str r0, [r4, #96] ; 0x60 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001d10: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001d14: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8001d18: 6822 ldr r2, [r4, #0] 8001d1a: 3532 adds r5, #50 ; 0x32 8001d1c: 6813 ldr r3, [r2, #0] 8001d1e: 35ff adds r5, #255 ; 0xff 8001d20: 43ab bics r3, r5 8001d22: 6013 str r3, [r2, #0] 8001d24: f380 8810 msr PRIMASK, r0 8001d28: e7c5 b.n 8001cb6 if (((isrflags & USART_ISR_TXE) != 0U) 8001d2a: 2280 movs r2, #128 ; 0x80 8001d2c: 4213 tst r3, r2 8001d2e: d003 beq.n 8001d38 && ((cr1its & USART_CR1_TXEIE) != 0U)) 8001d30: 4210 tst r0, r2 8001d32: d001 beq.n 8001d38 if (huart->TxISR != NULL) 8001d34: 6ea3 ldr r3, [r4, #104] ; 0x68 8001d36: e6e8 b.n 8001b0a if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) 8001d38: 2240 movs r2, #64 ; 0x40 8001d3a: 4213 tst r3, r2 8001d3c: d100 bne.n 8001d40 8001d3e: e756 b.n 8001bee 8001d40: 4210 tst r0, r2 8001d42: d100 bne.n 8001d46 8001d44: e753 b.n 8001bee __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001d46: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001d4a: 2301 movs r3, #1 8001d4c: f383 8810 msr PRIMASK, r3 * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8001d50: 6821 ldr r1, [r4, #0] 8001d52: 680b ldr r3, [r1, #0] 8001d54: 4393 bics r3, r2 8001d56: 600b str r3, [r1, #0] 8001d58: f380 8810 msr PRIMASK, r0 /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8001d5c: 2320 movs r3, #32 8001d5e: 67a3 str r3, [r4, #120] ; 0x78 /* Cleat TxISR function pointer */ huart->TxISR = NULL; 8001d60: 2300 movs r3, #0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 8001d62: 0020 movs r0, r4 huart->TxISR = NULL; 8001d64: 66a3 str r3, [r4, #104] ; 0x68 HAL_UART_TxCpltCallback(huart); 8001d66: f7ff fe52 bl 8001a0e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8001d6a: e740 b.n 8001bee 8001d6c: 0000080f .word 0x0000080f 8001d70: 04000120 .word 0x04000120 8001d74: 08001ad1 .word 0x08001ad1 8001d78: fffffeff .word 0xfffffeff 8001d7c: fffffedf .word 0xfffffedf 08001d80 : UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8001d80: 6a40 ldr r0, [r0, #36] ; 0x24 { 8001d82: b510 push {r4, lr} if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8001d84: 6e03 ldr r3, [r0, #96] ; 0x60 8001d86: 2b01 cmp r3, #1 8001d88: d106 bne.n 8001d98 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); 8001d8a: 0003 movs r3, r0 8001d8c: 3358 adds r3, #88 ; 0x58 8001d8e: 8819 ldrh r1, [r3, #0] 8001d90: 0849 lsrs r1, r1, #1 8001d92: f7ff fea8 bl 8001ae6 } 8001d96: bd10 pop {r4, pc} HAL_UART_RxHalfCpltCallback(huart); 8001d98: f7ff fe66 bl 8001a68 } 8001d9c: e7fb b.n 8001d96 ... 08001da0 : { 8001da0: 0003 movs r3, r0 if (hdma->Init.Mode != DMA_CIRCULAR) 8001da2: 699b ldr r3, [r3, #24] { 8001da4: b570 push {r4, r5, r6, lr} UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8001da6: 6a40 ldr r0, [r0, #36] ; 0x24 if (hdma->Init.Mode != DMA_CIRCULAR) 8001da8: 2b20 cmp r3, #32 8001daa: d034 beq.n 8001e16 huart->RxXferCount = 0U; 8001dac: 0003 movs r3, r0 8001dae: 2200 movs r2, #0 8001db0: 335a adds r3, #90 ; 0x5a 8001db2: 801a strh r2, [r3, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001db4: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001db8: 2301 movs r3, #1 8001dba: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001dbe: 6801 ldr r1, [r0, #0] 8001dc0: 4d1b ldr r5, [pc, #108] ; (8001e30 ) 8001dc2: 680a ldr r2, [r1, #0] 8001dc4: 402a ands r2, r5 8001dc6: 600a str r2, [r1, #0] 8001dc8: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001dcc: f3ef 8410 mrs r4, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001dd0: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001dd4: 6801 ldr r1, [r0, #0] 8001dd6: 688a ldr r2, [r1, #8] 8001dd8: 439a bics r2, r3 8001dda: 608a str r2, [r1, #8] 8001ddc: f384 8810 msr PRIMASK, r4 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001de0: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001de4: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001de8: 2440 movs r4, #64 ; 0x40 8001dea: 6802 ldr r2, [r0, #0] 8001dec: 6893 ldr r3, [r2, #8] 8001dee: 43a3 bics r3, r4 8001df0: 6093 str r3, [r2, #8] 8001df2: f381 8810 msr PRIMASK, r1 huart->RxState = HAL_UART_STATE_READY; 8001df6: 2320 movs r3, #32 8001df8: 67c3 str r3, [r0, #124] ; 0x7c if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8001dfa: 6e03 ldr r3, [r0, #96] ; 0x60 8001dfc: 2b01 cmp r3, #1 8001dfe: d10a bne.n 8001e16 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8001e00: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8001e04: f383 8810 msr PRIMASK, r3 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8001e08: 6802 ldr r2, [r0, #0] 8001e0a: 3c30 subs r4, #48 ; 0x30 8001e0c: 6813 ldr r3, [r2, #0] 8001e0e: 43a3 bics r3, r4 8001e10: 6013 str r3, [r2, #0] 8001e12: f381 8810 msr PRIMASK, r1 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8001e16: 6e03 ldr r3, [r0, #96] ; 0x60 8001e18: 2b01 cmp r3, #1 8001e1a: d105 bne.n 8001e28 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8001e1c: 0003 movs r3, r0 8001e1e: 3358 adds r3, #88 ; 0x58 8001e20: 8819 ldrh r1, [r3, #0] 8001e22: f7ff fe60 bl 8001ae6 } 8001e26: bd70 pop {r4, r5, r6, pc} HAL_UART_RxCpltCallback(huart); 8001e28: f7ff fe1d bl 8001a66 } 8001e2c: e7fb b.n 8001e26 8001e2e: 46c0 nop ; (mov r8, r8) 8001e30: fffffeff .word 0xfffffeff 08001e34 : { 8001e34: b570 push {r4, r5, r6, lr} 8001e36: 0004 movs r4, r0 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 8001e38: 6925 ldr r5, [r4, #16] 8001e3a: 68a2 ldr r2, [r4, #8] MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 8001e3c: 6801 ldr r1, [r0, #0] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 8001e3e: 432a orrs r2, r5 8001e40: 6965 ldr r5, [r4, #20] 8001e42: 69c3 ldr r3, [r0, #28] 8001e44: 432a orrs r2, r5 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 8001e46: 6808 ldr r0, [r1, #0] 8001e48: 4d39 ldr r5, [pc, #228] ; (8001f30 ) tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 8001e4a: 431a orrs r2, r3 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 8001e4c: 4028 ands r0, r5 8001e4e: 4302 orrs r2, r0 8001e50: 600a str r2, [r1, #0] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001e52: 684a ldr r2, [r1, #4] 8001e54: 4837 ldr r0, [pc, #220] ; (8001f34 ) tmpreg |= huart->Init.OneBitSampling; 8001e56: 6a25 ldr r5, [r4, #32] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001e58: 4002 ands r2, r0 8001e5a: 68e0 ldr r0, [r4, #12] 8001e5c: 4302 orrs r2, r0 8001e5e: 604a str r2, [r1, #4] tmpreg |= huart->Init.OneBitSampling; 8001e60: 69a2 ldr r2, [r4, #24] MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); 8001e62: 6888 ldr r0, [r1, #8] tmpreg |= huart->Init.OneBitSampling; 8001e64: 432a orrs r2, r5 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); 8001e66: 4d34 ldr r5, [pc, #208] ; (8001f38 ) 8001e68: 4028 ands r0, r5 8001e6a: 4302 orrs r2, r0 8001e6c: 608a str r2, [r1, #8] UART_GETCLOCKSOURCE(huart, clocksource); 8001e6e: 2103 movs r1, #3 8001e70: 4a32 ldr r2, [pc, #200] ; (8001f3c ) 8001e72: 6b12 ldr r2, [r2, #48] ; 0x30 8001e74: 400a ands r2, r1 8001e76: 2180 movs r1, #128 ; 0x80 8001e78: 3a01 subs r2, #1 8001e7a: 0209 lsls r1, r1, #8 8001e7c: 2a02 cmp r2, #2 8001e7e: d84c bhi.n 8001f1a 8001e80: 482f ldr r0, [pc, #188] ; (8001f40 ) 8001e82: 5c80 ldrb r0, [r0, r2] if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8001e84: 428b cmp r3, r1 8001e86: d124 bne.n 8001ed2 switch (clocksource) 8001e88: 2808 cmp r0, #8 8001e8a: d817 bhi.n 8001ebc 8001e8c: f7fe f946 bl 800011c <__gnu_thumb1_case_uqi> 8001e90: 16081647 .word 0x16081647 8001e94: 16161605 .word 0x16161605 8001e98: 09 .byte 0x09 8001e99: 00 .byte 0x00 pclk = HAL_RCC_GetSysClockFreq(); 8001e9a: f7ff fb89 bl 80015b0 8001e9e: e040 b.n 8001f22 switch (clocksource) 8001ea0: 4b28 ldr r3, [pc, #160] ; (8001f44 ) usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); 8001ea2: 0058 lsls r0, r3, #1 8001ea4: 6863 ldr r3, [r4, #4] 8001ea6: 6861 ldr r1, [r4, #4] 8001ea8: 085b lsrs r3, r3, #1 8001eaa: 18c0 adds r0, r0, r3 8001eac: f7fe f940 bl 8000130 <__udivsi3> if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 8001eb0: 4925 ldr r1, [pc, #148] ; (8001f48 ) 8001eb2: b282 uxth r2, r0 8001eb4: 3a10 subs r2, #16 8001eb6: 0403 lsls r3, r0, #16 8001eb8: 428a cmp r2, r1 8001eba: d901 bls.n 8001ec0 switch (clocksource) 8001ebc: 2001 movs r0, #1 8001ebe: e033 b.n 8001f28 brrtemp = (uint16_t)(usartdiv & 0xFFF0U); 8001ec0: 220f movs r2, #15 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); 8001ec2: 031b lsls r3, r3, #12 brrtemp = (uint16_t)(usartdiv & 0xFFF0U); 8001ec4: 4390 bics r0, r2 8001ec6: b280 uxth r0, r0 huart->Instance->BRR = brrtemp; 8001ec8: 6822 ldr r2, [r4, #0] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); 8001eca: 0f5b lsrs r3, r3, #29 huart->Instance->BRR = brrtemp; 8001ecc: 4318 orrs r0, r3 8001ece: 60d0 str r0, [r2, #12] 8001ed0: e029 b.n 8001f26 switch (clocksource) 8001ed2: 2808 cmp r0, #8 8001ed4: d8f2 bhi.n 8001ebc 8001ed6: f7fe f917 bl 8000108 <__gnu_thumb1_case_sqi> 8001eda: f116 .short 0xf116 8001edc: f11bf11e .word 0xf11bf11e 8001ee0: f1f1 .short 0xf1f1 8001ee2: 05 .byte 0x05 8001ee3: 00 .byte 0x00 8001ee4: 2080 movs r0, #128 ; 0x80 8001ee6: 0200 lsls r0, r0, #8 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); 8001ee8: 6863 ldr r3, [r4, #4] 8001eea: 6861 ldr r1, [r4, #4] 8001eec: 085b lsrs r3, r3, #1 8001eee: 1818 adds r0, r3, r0 8001ef0: f7fe f91e bl 8000130 <__udivsi3> 8001ef4: b280 uxth r0, r0 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 8001ef6: 0002 movs r2, r0 8001ef8: 4b13 ldr r3, [pc, #76] ; (8001f48 ) 8001efa: 3a10 subs r2, #16 8001efc: 429a cmp r2, r3 8001efe: d8dd bhi.n 8001ebc huart->Instance->BRR = usartdiv; 8001f00: 6823 ldr r3, [r4, #0] 8001f02: 60d8 str r0, [r3, #12] 8001f04: e00f b.n 8001f26 pclk = HAL_RCC_GetPCLK1Freq(); 8001f06: f7ff fc09 bl 800171c if (pclk != 0U) 8001f0a: 2800 cmp r0, #0 8001f0c: d00b beq.n 8001f26 8001f0e: e7eb b.n 8001ee8 pclk = HAL_RCC_GetSysClockFreq(); 8001f10: f7ff fb4e bl 80015b0 break; 8001f14: e7f9 b.n 8001f0a pclk = (uint32_t) HSI_VALUE; 8001f16: 480b ldr r0, [pc, #44] ; (8001f44 ) 8001f18: e7e6 b.n 8001ee8 if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8001f1a: 428b cmp r3, r1 8001f1c: d1f3 bne.n 8001f06 pclk = HAL_RCC_GetPCLK1Freq(); 8001f1e: f7ff fbfd bl 800171c pclk = HAL_RCC_GetSysClockFreq(); 8001f22: 1e03 subs r3, r0, #0 if (pclk != 0U) 8001f24: d1bd bne.n 8001ea2 8001f26: 2000 movs r0, #0 huart->RxISR = NULL; 8001f28: 2300 movs r3, #0 8001f2a: 6663 str r3, [r4, #100] ; 0x64 huart->TxISR = NULL; 8001f2c: 66a3 str r3, [r4, #104] ; 0x68 } 8001f2e: bd70 pop {r4, r5, r6, pc} 8001f30: ffff69f3 .word 0xffff69f3 8001f34: ffffcfff .word 0xffffcfff 8001f38: fffff4ff .word 0xfffff4ff 8001f3c: 40021000 .word 0x40021000 8001f40: 0800257a .word 0x0800257a 8001f44: 007a1200 .word 0x007a1200 8001f48: 0000ffef .word 0x0000ffef 08001f4c : if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) 8001f4c: 6a43 ldr r3, [r0, #36] ; 0x24 { 8001f4e: b530 push {r4, r5, lr} if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) 8001f50: 07da lsls r2, r3, #31 8001f52: d506 bpl.n 8001f62 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); 8001f54: 6801 ldr r1, [r0, #0] 8001f56: 4c28 ldr r4, [pc, #160] ; (8001ff8 ) 8001f58: 684a ldr r2, [r1, #4] 8001f5a: 4022 ands r2, r4 8001f5c: 6a84 ldr r4, [r0, #40] ; 0x28 8001f5e: 4322 orrs r2, r4 8001f60: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) 8001f62: 079a lsls r2, r3, #30 8001f64: d506 bpl.n 8001f74 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); 8001f66: 6801 ldr r1, [r0, #0] 8001f68: 4c24 ldr r4, [pc, #144] ; (8001ffc ) 8001f6a: 684a ldr r2, [r1, #4] 8001f6c: 4022 ands r2, r4 8001f6e: 6ac4 ldr r4, [r0, #44] ; 0x2c 8001f70: 4322 orrs r2, r4 8001f72: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) 8001f74: 075a lsls r2, r3, #29 8001f76: d506 bpl.n 8001f86 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); 8001f78: 6801 ldr r1, [r0, #0] 8001f7a: 4c21 ldr r4, [pc, #132] ; (8002000 ) 8001f7c: 684a ldr r2, [r1, #4] 8001f7e: 4022 ands r2, r4 8001f80: 6b04 ldr r4, [r0, #48] ; 0x30 8001f82: 4322 orrs r2, r4 8001f84: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) 8001f86: 071a lsls r2, r3, #28 8001f88: d506 bpl.n 8001f98 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); 8001f8a: 6801 ldr r1, [r0, #0] 8001f8c: 4c1d ldr r4, [pc, #116] ; (8002004 ) 8001f8e: 684a ldr r2, [r1, #4] 8001f90: 4022 ands r2, r4 8001f92: 6b44 ldr r4, [r0, #52] ; 0x34 8001f94: 4322 orrs r2, r4 8001f96: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) 8001f98: 06da lsls r2, r3, #27 8001f9a: d506 bpl.n 8001faa MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); 8001f9c: 6801 ldr r1, [r0, #0] 8001f9e: 4c1a ldr r4, [pc, #104] ; (8002008 ) 8001fa0: 688a ldr r2, [r1, #8] 8001fa2: 4022 ands r2, r4 8001fa4: 6b84 ldr r4, [r0, #56] ; 0x38 8001fa6: 4322 orrs r2, r4 8001fa8: 608a str r2, [r1, #8] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) 8001faa: 069a lsls r2, r3, #26 8001fac: d506 bpl.n 8001fbc MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); 8001fae: 6801 ldr r1, [r0, #0] 8001fb0: 4c16 ldr r4, [pc, #88] ; (800200c ) 8001fb2: 688a ldr r2, [r1, #8] 8001fb4: 4022 ands r2, r4 8001fb6: 6bc4 ldr r4, [r0, #60] ; 0x3c 8001fb8: 4322 orrs r2, r4 8001fba: 608a str r2, [r1, #8] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) 8001fbc: 065a lsls r2, r3, #25 8001fbe: d510 bpl.n 8001fe2 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); 8001fc0: 6801 ldr r1, [r0, #0] 8001fc2: 4d13 ldr r5, [pc, #76] ; (8002010 ) 8001fc4: 684a ldr r2, [r1, #4] 8001fc6: 6c04 ldr r4, [r0, #64] ; 0x40 8001fc8: 402a ands r2, r5 8001fca: 4322 orrs r2, r4 8001fcc: 604a str r2, [r1, #4] if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) 8001fce: 2280 movs r2, #128 ; 0x80 8001fd0: 0352 lsls r2, r2, #13 8001fd2: 4294 cmp r4, r2 8001fd4: d105 bne.n 8001fe2 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); 8001fd6: 684a ldr r2, [r1, #4] 8001fd8: 4c0e ldr r4, [pc, #56] ; (8002014 ) 8001fda: 4022 ands r2, r4 8001fdc: 6c44 ldr r4, [r0, #68] ; 0x44 8001fde: 4322 orrs r2, r4 8001fe0: 604a str r2, [r1, #4] if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) 8001fe2: 061b lsls r3, r3, #24 8001fe4: d506 bpl.n 8001ff4 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); 8001fe6: 6802 ldr r2, [r0, #0] 8001fe8: 490b ldr r1, [pc, #44] ; (8002018 ) 8001fea: 6853 ldr r3, [r2, #4] 8001fec: 400b ands r3, r1 8001fee: 6c81 ldr r1, [r0, #72] ; 0x48 8001ff0: 430b orrs r3, r1 8001ff2: 6053 str r3, [r2, #4] } 8001ff4: bd30 pop {r4, r5, pc} 8001ff6: 46c0 nop ; (mov r8, r8) 8001ff8: fffdffff .word 0xfffdffff 8001ffc: fffeffff .word 0xfffeffff 8002000: fffbffff .word 0xfffbffff 8002004: ffff7fff .word 0xffff7fff 8002008: ffffefff .word 0xffffefff 800200c: ffffdfff .word 0xffffdfff 8002010: ffefffff .word 0xffefffff 8002014: ff9fffff .word 0xff9fffff 8002018: fff7ffff .word 0xfff7ffff 0800201c : { 800201c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) 800201e: 2780 movs r7, #128 ; 0x80 { 8002020: 0004 movs r4, r0 8002022: 000d movs r5, r1 8002024: 0016 movs r6, r2 8002026: 9301 str r3, [sp, #4] if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) 8002028: 013f lsls r7, r7, #4 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800202a: 6822 ldr r2, [r4, #0] 800202c: 69d3 ldr r3, [r2, #28] 800202e: 402b ands r3, r5 8002030: 1b5b subs r3, r3, r5 8002032: 4259 negs r1, r3 8002034: 414b adcs r3, r1 8002036: 42b3 cmp r3, r6 8002038: d001 beq.n 800203e return HAL_OK; 800203a: 2000 movs r0, #0 800203c: e028 b.n 8002090 if (Timeout != HAL_MAX_DELAY) 800203e: 9b08 ldr r3, [sp, #32] 8002040: 3301 adds r3, #1 8002042: d0f3 beq.n 800202c if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002044: f7fe fd40 bl 8000ac8 8002048: 9b01 ldr r3, [sp, #4] 800204a: 1ac0 subs r0, r0, r3 800204c: 9b08 ldr r3, [sp, #32] 800204e: 4298 cmp r0, r3 8002050: d801 bhi.n 8002056 8002052: 2b00 cmp r3, #0 8002054: d11d bne.n 8002092 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8002056: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800205a: 2201 movs r2, #1 800205c: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8002060: 6821 ldr r1, [r4, #0] 8002062: 4d1e ldr r5, [pc, #120] ; (80020dc ) 8002064: 680b ldr r3, [r1, #0] 8002066: 402b ands r3, r5 8002068: 600b str r3, [r1, #0] 800206a: f380 8810 msr PRIMASK, r0 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 800206e: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8002072: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8002076: 6821 ldr r1, [r4, #0] 8002078: 688b ldr r3, [r1, #8] 800207a: 4393 bics r3, r2 800207c: 608b str r3, [r1, #8] 800207e: f380 8810 msr PRIMASK, r0 huart->gState = HAL_UART_STATE_READY; 8002082: 2320 movs r3, #32 8002084: 67a3 str r3, [r4, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; 8002086: 67e3 str r3, [r4, #124] ; 0x7c __HAL_UNLOCK(huart); 8002088: 2300 movs r3, #0 return HAL_TIMEOUT; 800208a: 2003 movs r0, #3 __HAL_UNLOCK(huart); 800208c: 3474 adds r4, #116 ; 0x74 800208e: 7023 strb r3, [r4, #0] } 8002090: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) 8002092: 2104 movs r1, #4 8002094: 6823 ldr r3, [r4, #0] 8002096: 681a ldr r2, [r3, #0] 8002098: 420a tst r2, r1 800209a: d0c6 beq.n 800202a if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) 800209c: 69da ldr r2, [r3, #28] 800209e: 423a tst r2, r7 80020a0: d0c3 beq.n 800202a __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); 80020a2: 621f str r7, [r3, #32] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 80020a4: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 80020a8: 2201 movs r2, #1 80020aa: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80020ae: 6821 ldr r1, [r4, #0] 80020b0: 4d0a ldr r5, [pc, #40] ; (80020dc ) 80020b2: 680b ldr r3, [r1, #0] 80020b4: 402b ands r3, r5 80020b6: 600b str r3, [r1, #0] 80020b8: f380 8810 msr PRIMASK, r0 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 80020bc: f3ef 8010 mrs r0, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 80020c0: f382 8810 msr PRIMASK, r2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80020c4: 6821 ldr r1, [r4, #0] 80020c6: 688b ldr r3, [r1, #8] 80020c8: 4393 bics r3, r2 80020ca: 608b str r3, [r1, #8] 80020cc: f380 8810 msr PRIMASK, r0 huart->gState = HAL_UART_STATE_READY; 80020d0: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_RTO; 80020d2: 1d22 adds r2, r4, #4 huart->gState = HAL_UART_STATE_READY; 80020d4: 67a3 str r3, [r4, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; 80020d6: 67e3 str r3, [r4, #124] ; 0x7c huart->ErrorCode = HAL_UART_ERROR_RTO; 80020d8: 67d3 str r3, [r2, #124] ; 0x7c 80020da: e7d5 b.n 8002088 80020dc: fffffe5f .word 0xfffffe5f 080020e0 : { 80020e0: b573 push {r0, r1, r4, r5, r6, lr} huart->ErrorCode = HAL_UART_ERROR_NONE; 80020e2: 2600 movs r6, #0 { 80020e4: 0004 movs r4, r0 huart->ErrorCode = HAL_UART_ERROR_NONE; 80020e6: 1d03 adds r3, r0, #4 80020e8: 67de str r6, [r3, #124] ; 0x7c tickstart = HAL_GetTick(); 80020ea: f7fe fced bl 8000ac8 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) 80020ee: 6823 ldr r3, [r4, #0] tickstart = HAL_GetTick(); 80020f0: 0005 movs r5, r0 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) 80020f2: 681b ldr r3, [r3, #0] 80020f4: 071b lsls r3, r3, #28 80020f6: d416 bmi.n 8002126 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) 80020f8: 6823 ldr r3, [r4, #0] 80020fa: 681b ldr r3, [r3, #0] 80020fc: 075b lsls r3, r3, #29 80020fe: d50a bpl.n 8002116 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 8002100: 2180 movs r1, #128 ; 0x80 8002102: 4b0f ldr r3, [pc, #60] ; (8002140 ) 8002104: 2200 movs r2, #0 8002106: 9300 str r3, [sp, #0] 8002108: 0020 movs r0, r4 800210a: 002b movs r3, r5 800210c: 03c9 lsls r1, r1, #15 800210e: f7ff ff85 bl 800201c 8002112: 2800 cmp r0, #0 8002114: d112 bne.n 800213c huart->gState = HAL_UART_STATE_READY; 8002116: 2320 movs r3, #32 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8002118: 2000 movs r0, #0 huart->gState = HAL_UART_STATE_READY; 800211a: 67a3 str r3, [r4, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; 800211c: 67e3 str r3, [r4, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 800211e: 6620 str r0, [r4, #96] ; 0x60 __HAL_UNLOCK(huart); 8002120: 3474 adds r4, #116 ; 0x74 8002122: 7020 strb r0, [r4, #0] return HAL_OK; 8002124: e00b b.n 800213e if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 8002126: 2180 movs r1, #128 ; 0x80 8002128: 4b05 ldr r3, [pc, #20] ; (8002140 ) 800212a: 0032 movs r2, r6 800212c: 9300 str r3, [sp, #0] 800212e: 0389 lsls r1, r1, #14 8002130: 0003 movs r3, r0 8002132: 0020 movs r0, r4 8002134: f7ff ff72 bl 800201c 8002138: 2800 cmp r0, #0 800213a: d0dd beq.n 80020f8 return HAL_TIMEOUT; 800213c: 2003 movs r0, #3 } 800213e: bd76 pop {r1, r2, r4, r5, r6, pc} 8002140: 01ffffff .word 0x01ffffff 08002144 : { 8002144: b510 push {r4, lr} 8002146: 1e04 subs r4, r0, #0 if (huart == NULL) 8002148: d101 bne.n 800214e return HAL_ERROR; 800214a: 2001 movs r0, #1 } 800214c: bd10 pop {r4, pc} if (huart->gState == HAL_UART_STATE_RESET) 800214e: 6f83 ldr r3, [r0, #120] ; 0x78 8002150: 2b00 cmp r3, #0 8002152: d104 bne.n 800215e huart->Lock = HAL_UNLOCKED; 8002154: 0002 movs r2, r0 8002156: 3274 adds r2, #116 ; 0x74 8002158: 7013 strb r3, [r2, #0] HAL_UART_MspInit(huart); 800215a: f7fe fa65 bl 8000628 huart->gState = HAL_UART_STATE_BUSY; 800215e: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8002160: 2101 movs r1, #1 8002162: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8002164: 67a3 str r3, [r4, #120] ; 0x78 __HAL_UART_DISABLE(huart); 8002166: 6813 ldr r3, [r2, #0] if (UART_SetConfig(huart) == HAL_ERROR) 8002168: 0020 movs r0, r4 __HAL_UART_DISABLE(huart); 800216a: 438b bics r3, r1 800216c: 6013 str r3, [r2, #0] if (UART_SetConfig(huart) == HAL_ERROR) 800216e: f7ff fe61 bl 8001e34 8002172: 2801 cmp r0, #1 8002174: d0e9 beq.n 800214a if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 8002176: 6a63 ldr r3, [r4, #36] ; 0x24 8002178: 2b00 cmp r3, #0 800217a: d002 beq.n 8002182 UART_AdvFeatureConfig(huart); 800217c: 0020 movs r0, r4 800217e: f7ff fee5 bl 8001f4c CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); 8002182: 6823 ldr r3, [r4, #0] 8002184: 4907 ldr r1, [pc, #28] ; (80021a4 ) 8002186: 685a ldr r2, [r3, #4] return (UART_CheckIdleState(huart)); 8002188: 0020 movs r0, r4 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); 800218a: 400a ands r2, r1 CLEAR_BIT(huart->Instance->CR3, USART_CR3_HDSEL); 800218c: 2108 movs r1, #8 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); 800218e: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, USART_CR3_HDSEL); 8002190: 689a ldr r2, [r3, #8] 8002192: 438a bics r2, r1 8002194: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); 8002196: 2201 movs r2, #1 8002198: 6819 ldr r1, [r3, #0] 800219a: 430a orrs r2, r1 800219c: 601a str r2, [r3, #0] return (UART_CheckIdleState(huart)); 800219e: f7ff ff9f bl 80020e0 80021a2: e7d3 b.n 800214c 80021a4: fffff7ff .word 0xfffff7ff 080021a8 : { 80021a8: b5f8 push {r3, r4, r5, r6, r7, lr} 80021aa: 0013 movs r3, r2 huart->RxXferSize = Size; 80021ac: 0002 movs r2, r0 { 80021ae: 0004 movs r4, r0 huart->RxXferSize = Size; 80021b0: 3258 adds r2, #88 ; 0x58 huart->pRxBuffPtr = pData; 80021b2: 6541 str r1, [r0, #84] ; 0x54 huart->ErrorCode = HAL_UART_ERROR_NONE; 80021b4: 2500 movs r5, #0 huart->RxXferSize = Size; 80021b6: 8013 strh r3, [r2, #0] huart->RxState = HAL_UART_STATE_BUSY_RX; 80021b8: 2222 movs r2, #34 ; 0x22 80021ba: 0026 movs r6, r4 huart->ErrorCode = HAL_UART_ERROR_NONE; 80021bc: 1d07 adds r7, r0, #4 80021be: 67fd str r5, [r7, #124] ; 0x7c huart->RxState = HAL_UART_STATE_BUSY_RX; 80021c0: 67c2 str r2, [r0, #124] ; 0x7c if (huart->hdmarx != NULL) 80021c2: 6f00 ldr r0, [r0, #112] ; 0x70 80021c4: 3674 adds r6, #116 ; 0x74 80021c6: 42a8 cmp r0, r5 80021c8: d016 beq.n 80021f8 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80021ca: 4a1e ldr r2, [pc, #120] ; (8002244 ) huart->hdmarx->XferAbortCallback = NULL; 80021cc: 6345 str r5, [r0, #52] ; 0x34 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80021ce: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 80021d0: 4a1d ldr r2, [pc, #116] ; (8002248 ) 80021d2: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 80021d4: 4a1d ldr r2, [pc, #116] ; (800224c ) 80021d6: 6302 str r2, [r0, #48] ; 0x30 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) 80021d8: 6822 ldr r2, [r4, #0] 80021da: 3224 adds r2, #36 ; 0x24 80021dc: 4694 mov ip, r2 80021de: 000a movs r2, r1 80021e0: 4661 mov r1, ip 80021e2: f7fe fd0b bl 8000bfc 80021e6: 42a8 cmp r0, r5 80021e8: d006 beq.n 80021f8 huart->ErrorCode = HAL_UART_ERROR_DMA; 80021ea: 2310 movs r3, #16 return HAL_ERROR; 80021ec: 2001 movs r0, #1 huart->ErrorCode = HAL_UART_ERROR_DMA; 80021ee: 67fb str r3, [r7, #124] ; 0x7c huart->RxState = HAL_UART_STATE_READY; 80021f0: 18db adds r3, r3, r3 __HAL_UNLOCK(huart); 80021f2: 7035 strb r5, [r6, #0] huart->RxState = HAL_UART_STATE_READY; 80021f4: 67e3 str r3, [r4, #124] ; 0x7c } 80021f6: bdf8 pop {r3, r4, r5, r6, r7, pc} __HAL_UNLOCK(huart); 80021f8: 2000 movs r0, #0 80021fa: 7030 strb r0, [r6, #0] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 80021fc: f3ef 8510 mrs r5, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 8002200: 2301 movs r3, #1 8002202: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8002206: 2280 movs r2, #128 ; 0x80 8002208: 6821 ldr r1, [r4, #0] 800220a: 0052 lsls r2, r2, #1 800220c: 680e ldr r6, [r1, #0] 800220e: 4332 orrs r2, r6 8002210: 600a str r2, [r1, #0] 8002212: f385 8810 msr PRIMASK, r5 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8002216: f3ef 8510 mrs r5, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800221a: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 800221e: 6821 ldr r1, [r4, #0] 8002220: 688a ldr r2, [r1, #8] 8002222: 431a orrs r2, r3 8002224: 608a str r2, [r1, #8] 8002226: f385 8810 msr PRIMASK, r5 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 800222a: f3ef 8110 mrs r1, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800222e: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8002232: 6822 ldr r2, [r4, #0] 8002234: 333f adds r3, #63 ; 0x3f 8002236: 6894 ldr r4, [r2, #8] 8002238: 4323 orrs r3, r4 800223a: 6093 str r3, [r2, #8] 800223c: f381 8810 msr PRIMASK, r1 return HAL_OK; 8002240: e7d9 b.n 80021f6 8002242: 46c0 nop ; (mov r8, r8) 8002244: 08001da1 .word 0x08001da1 8002248: 08001d81 .word 0x08001d81 800224c: 08001a6d .word 0x08001a6d 08002250 : { 8002250: b570 push {r4, r5, r6, lr} if (huart->RxState == HAL_UART_STATE_READY) 8002252: 6fc4 ldr r4, [r0, #124] ; 0x7c return HAL_BUSY; 8002254: 2302 movs r3, #2 if (huart->RxState == HAL_UART_STATE_READY) 8002256: 2c20 cmp r4, #32 8002258: d12d bne.n 80022b6 return HAL_ERROR; 800225a: 3b01 subs r3, #1 if ((pData == NULL) || (Size == 0U)) 800225c: 2900 cmp r1, #0 800225e: d02a beq.n 80022b6 8002260: 2a00 cmp r2, #0 8002262: d028 beq.n 80022b6 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8002264: 2380 movs r3, #128 ; 0x80 8002266: 6884 ldr r4, [r0, #8] 8002268: 015b lsls r3, r3, #5 800226a: 429c cmp r4, r3 800226c: d106 bne.n 800227c 800226e: 6903 ldr r3, [r0, #16] 8002270: 2b00 cmp r3, #0 8002272: d103 bne.n 800227c if ((((uint32_t)pData) & 1U) != 0U) 8002274: 2401 movs r4, #1 return HAL_ERROR; 8002276: 0023 movs r3, r4 if ((((uint32_t)pData) & 1U) != 0U) 8002278: 4221 tst r1, r4 800227a: d11c bne.n 80022b6 __HAL_LOCK(huart); 800227c: 0004 movs r4, r0 800227e: 3474 adds r4, #116 ; 0x74 8002280: 7825 ldrb r5, [r4, #0] return HAL_BUSY; 8002282: 2302 movs r3, #2 __HAL_LOCK(huart); 8002284: 2d01 cmp r5, #1 8002286: d016 beq.n 80022b6 8002288: 3b01 subs r3, #1 800228a: 7023 strb r3, [r4, #0] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 800228c: 2400 movs r4, #0 800228e: 6604 str r4, [r0, #96] ; 0x60 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) 8002290: 6804 ldr r4, [r0, #0] 8002292: 6864 ldr r4, [r4, #4] 8002294: 0224 lsls r4, r4, #8 8002296: d50b bpl.n 80022b0 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 8002298: f3ef 8510 mrs r5, PRIMASK __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 800229c: f383 8810 msr PRIMASK, r3 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); 80022a0: 2380 movs r3, #128 ; 0x80 80022a2: 6804 ldr r4, [r0, #0] 80022a4: 04db lsls r3, r3, #19 80022a6: 6826 ldr r6, [r4, #0] 80022a8: 4333 orrs r3, r6 80022aa: 6023 str r3, [r4, #0] 80022ac: f385 8810 msr PRIMASK, r5 return (UART_Start_Receive_DMA(huart, pData, Size)); 80022b0: f7ff ff7a bl 80021a8 80022b4: 0003 movs r3, r0 } 80022b6: 0018 movs r0, r3 80022b8: bd70 pop {r4, r5, r6, pc} ... 080022bc <__libc_init_array>: 80022bc: b570 push {r4, r5, r6, lr} 80022be: 2600 movs r6, #0 80022c0: 4d0c ldr r5, [pc, #48] ; (80022f4 <__libc_init_array+0x38>) 80022c2: 4c0d ldr r4, [pc, #52] ; (80022f8 <__libc_init_array+0x3c>) 80022c4: 1b64 subs r4, r4, r5 80022c6: 10a4 asrs r4, r4, #2 80022c8: 42a6 cmp r6, r4 80022ca: d109 bne.n 80022e0 <__libc_init_array+0x24> 80022cc: 2600 movs r6, #0 80022ce: f000 f82b bl 8002328 <_init> 80022d2: 4d0a ldr r5, [pc, #40] ; (80022fc <__libc_init_array+0x40>) 80022d4: 4c0a ldr r4, [pc, #40] ; (8002300 <__libc_init_array+0x44>) 80022d6: 1b64 subs r4, r4, r5 80022d8: 10a4 asrs r4, r4, #2 80022da: 42a6 cmp r6, r4 80022dc: d105 bne.n 80022ea <__libc_init_array+0x2e> 80022de: bd70 pop {r4, r5, r6, pc} 80022e0: 00b3 lsls r3, r6, #2 80022e2: 58eb ldr r3, [r5, r3] 80022e4: 4798 blx r3 80022e6: 3601 adds r6, #1 80022e8: e7ee b.n 80022c8 <__libc_init_array+0xc> 80022ea: 00b3 lsls r3, r6, #2 80022ec: 58eb ldr r3, [r5, r3] 80022ee: 4798 blx r3 80022f0: 3601 adds r6, #1 80022f2: e7f2 b.n 80022da <__libc_init_array+0x1e> 80022f4: 08002580 .word 0x08002580 80022f8: 08002580 .word 0x08002580 80022fc: 08002580 .word 0x08002580 8002300: 08002584 .word 0x08002584 08002304 : 8002304: 2300 movs r3, #0 8002306: b510 push {r4, lr} 8002308: 429a cmp r2, r3 800230a: d100 bne.n 800230e 800230c: bd10 pop {r4, pc} 800230e: 5ccc ldrb r4, [r1, r3] 8002310: 54c4 strb r4, [r0, r3] 8002312: 3301 adds r3, #1 8002314: e7f8 b.n 8002308 08002316 : 8002316: 0003 movs r3, r0 8002318: 1882 adds r2, r0, r2 800231a: 4293 cmp r3, r2 800231c: d100 bne.n 8002320 800231e: 4770 bx lr 8002320: 7019 strb r1, [r3, #0] 8002322: 3301 adds r3, #1 8002324: e7f9 b.n 800231a ... 08002328 <_init>: 8002328: b5f8 push {r3, r4, r5, r6, r7, lr} 800232a: 46c0 nop ; (mov r8, r8) 800232c: bcf8 pop {r3, r4, r5, r6, r7} 800232e: bc08 pop {r3} 8002330: 469e mov lr, r3 8002332: 4770 bx lr 08002334 <_fini>: 8002334: b5f8 push {r3, r4, r5, r6, r7, lr} 8002336: 46c0 nop ; (mov r8, r8) 8002338: bcf8 pop {r3, r4, r5, r6, r7} 800233a: bc08 pop {r3} 800233c: 469e mov lr, r3 800233e: 4770 bx lr